參數(shù)資料
型號: SLB128B
廠商: National Semiconductor Corporation
英文描述: Transmitter with built-in scaler for LVDS Display Interface (LDI)
中文描述: 發(fā)射器內(nèi)置的LVDS顯示接口(低密度脂蛋白縮放)
文件頁數(shù): 20/48頁
文件大?。?/td> 650K
代理商: SLB128B
Host Control Register Descriptions
(Continued)
Register Name: CFG2
Address Offset: 09h
Default Value:
Access Method: R/W
95h
Bit
0
1
2
Description
MDI (read only)
Reserved
RSEN (read only)—Receiver Sense
0= LVDS receiver connected to transmitter output,
1= No receiver connected
Note: this function is valid only with DC coupled systems
TSEL —Interrupt generation
0= Interrupt bit (MDI) is generated by monitoring RSEN, fixed valve
MSEL (R/W)—Selects source for MSEL output pin
000= MSEN disabled
001= Output the MDI bit - interrupt
010= Output the RSEN bit - receiver detect
011–111= Reserved
VLOW (read only)
1= V
REF
set for low swing,
0= V
REF
set for LVTTL
3
4:6
7
Register Name: CFG3
Address Offset: 0Ah
Default Value:
Access Method: R/W
81H
Bit
0
Description
R_FDE- Input DE strobe Polarity Select
0 = DE active Low,
1 = DE active High
Reserved
Reserved
3:1
7:4
Register Name: CFG
Address Offset: 0Bh
Default Value:
Access Method: Read Only
See Description
Bit
7:0
Description
Contains state of input data bits 23:16
Register Name: PANEL
Address Offset: 0Ch
Default Value:
Access Method: R/W
See Description
Bit
0:3
4:7
Description
System defined Panel ID values set on ID0:3 pins (Read Only)
System defined Panel ID field which can be written/ read from host
D
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