參數(shù)資料
型號: SPL505YC264BTT
廠商: Silicon Laboratories Inc
文件頁數(shù): 13/27頁
文件大小: 0K
描述: IC CLOCK CK505 BEARLAKE 64TSSOP
標(biāo)準(zhǔn)包裝: 2,000
類型: 時(shí)鐘/頻率發(fā)生器,多路復(fù)用器
PLL:
主要目的: Intel CPU,PCI Express(PCIe)
輸入: 晶體
輸出: LVCMOS
電路數(shù): 1
比率 - 輸入:輸出: 1:22
差分 - 輸入:輸出: 無/是
頻率 - 最大: 400MHz
電源電壓: 3.135 V ~ 3.465 V
工作溫度: 0°C ~ 85°C
安裝類型: *
封裝/外殼: *
供應(yīng)商設(shè)備封裝: *
包裝: *
SPL505YC26
....................Document #: 001-03543 Rev *E Page 20 of 27
Absolute Maximum Conditions
Parameter
Description
Condition
Min.
Max.
Unit
VDD
Core Supply Voltage
–0.5
4.6
V
VDD_A
Analog Supply Voltage
–0.5
4.6
V
VDD_IO
IO Supply Voltage
1.5
V
VIN
Input Voltage
Relative to VSS
–0.5
4.6
VDC
TS
Temperature, Storage
Non-functional
–65
150
°C
TA
Temperature, Operating Ambient
Functional
0
85
°C
TJ
Temperature, Junction
Functional
150
°C
JC
Dissipation, Junction to Case
Mil-STD-883E Method 1012.1
20
°C/W
JA
Dissipation, Junction to Ambient
JEDEC (JESD 51)
60
°C/W
ESDHBM
ESD Protection (Human Body Model) MIL-STD-883, Method 3015
2000
V
UL-94
Flammability Rating
At 1/8 in.
V–0
MSL
Moisture Sensitivity Level
1
Multiple Supplies: The Voltage on any input or I/O pin cannot exceed the power pin during power-up. Power supply sequencing is NOT required.
DC Electrical Specifications
Parameter
Description
Condition
Min.
Max.
Unit
VDD core
3.3V Operating Voltage
3.3 ± 5%
3.135
3.465
V
VIH
3.3V Input High Voltage (SE)
2.0
VDD + 0.3 V
VIL
3.3V Input Low Voltage (SE)
VSS–0.3
0.8
V
VIHI2C
Input High Voltage
SDATA, SCLK
2.2
V
VILI2C
Input Low Voltage
SDATA, SCLK
1.0
V
VIH_FS
FS_[A,B] Input High Voltage
0.7
1.5
V
VIL_FS
FS_[A,B] Input Low Voltage
VSS–0.3
0.35
V
VIHFS_C_TEST
FS_C Input High Voltage
2
VDD + 0.3 V
VIMFS_C_NORMAL FS_C Input Middle Voltage
0.7
1.5
V
VILFS_C_NORMAL FS_C Input Low Voltage
VSS–0.3
0.35
V
PCI3/CFG0_HIGH PCI3/CFG0 Input High Voltage
Typ. 2.75V
2.40
VDD
V
PCI3/CFG0_MID
PCI3/CFG0 Input Mid Voltage
Typ. 1.65V
1.30
2.00
V
PCI3/CFG0_LOW PCI3/CFG0 Input Low Voltage
Typ. 0.550V
0
0.900
V
IIH
Input High Leakage Current
except internal pull-down resistors, 0< VIN<VDD
–5
A
IIL
Input Low Leakage Current
except internal pull-up resistors, 0 < VIN < VDD
–5
A
VOH
3.3V Output High Voltage (SE)
IOH = –1 mA
2.4
V
VOL
3.3V Output Low Voltage (SE)
IOL = 1 mA
0.4
V
VDD IO
Low Voltage IO Supply Voltage
0.72
0.88
VOH
3.3V Input High Voltage (DIFF)
0.70
0.90
V
VOL
3.3V Input Low Voltage (DIFF)
0.40
V
IOZ
High-impedance Output Current
–10
10
A
CIN
Input Pin Capacitance
1.5
5
pF
COUT
Output Pin Capacitance
6
pF
LIN
Pin Inductance
7
nH
VXIH
Xin High Voltage
0.7VDD
VDD
V
VXIL
Xin Low Voltage
0
0.3VDD
V
IDD3.3V
Dynamic Supply Current
250
mA
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