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參數(shù)資料
| 型號(hào)： | SPL505YC264BTT |
| 廠商： | Silicon Laboratories Inc |
| 文件頁(yè)數(shù)： | 17/27頁(yè) |
| 文件大小： | 0K |
| 描述： | IC CLOCK CK505 BEARLAKE 64TSSOP |
| 標(biāo)準(zhǔn)包裝： | 2,000 |
| 類型： | 時(shí)鐘/頻率發(fā)生器，多路復(fù)用器 |
| PLL： | 是 |
| 主要目的： | Intel CPU，PCI Express（PCIe） |
| 輸入： | 晶體 |
| 輸出： | LVCMOS |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 1:22 |
| 差分 - 輸入:輸出： | 無(wú)/是 |
| 頻率 - 最大： | 400MHz |
| 電源電壓： | 3.135 V ~ 3.465 V |
| 工作溫度： | 0°C ~ 85°C |
| 安裝類型： | * |
| 封裝/外殼： | * |
| 供應(yīng)商設(shè)備封裝： | * |
| 包裝： | * |
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SPL505YC2
....................Document #: 001-03543 Rev *E Page 24 of 27
The information in this document is believed to be accurate in all respects at the time of publication but is subject to change without notice. Sil-
icon Laboratories assumes no responsibility for errors and omissions, and disclaims responsibility for any consequences resulting from the
use of information included herein. Additionally, Silicon Laboratories assumes no responsibility for the functioning of undescribed features or
parameters. Silicon Laboratories reserves the right to make changes without further notice. Silicon Laboratories makes no warranty, repre-
sentation or guarantee regarding the suitability of its products for any particular purpose, nor does Silicon Laboratories assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation conse-
quential or incidental damages. Silicon Laboratories products are not designed, intended, or authorized for use in applications intended to
support or sustain life, or for any other application in which the failure of the Silicon Laboratories product could create a situation where per-
sonal injury or death may occur. Should Buyer purchase or use Silicon Laboratories products for any such unintended or unauthorized appli-
cation, Buyer shall indemnify and hold Silicon Laboratories harmless against all claims and damages.
Test and Measurement Set-up
For PCI Single-ended Signals and Reference
The following diagram shows the test load configurations for the single-ended PCI, USB, and REF output signals.
LACC
Long Term Accuracy
Measurement at 1.5V
–
100
ppm
ENABLE/DISABLE and SET-UP
TSTABLE
Clock Stabilization from Power-up
–1.8
ms
TSS
Stopclock Set-up Time
10.0
–
ns
AC Electrical Specifications (continued)
Parameter
Description
Condition
Min.
Max.
Unit
22
Measurement
Point
4 pF
50
22
Measurement
Point
4 pF
50
PCI/USB
L1
L2
L1
L2
L1 = 0.5", L2 = 8"
Figure 9. Single-ended PCI and USB Double Load Configuration
50
15
Measurement
Point
4 pF
50
15
Measurement
Point
4 pF
50
REF
L2
L1
L2
15
Measurement
Point
4 pF
L1
Figure 10. Single-ended REF Triple Load Configuration
Figure 11. Single-ended Output Signals (for AC Parameters Measurement)
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