參數(shù)資料
型號(hào)： ST6375B1/XXX
廠商： STMICROELECTRONICS
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDIP42
封裝： SHRINK, PLASTIC, DIP-42
文件頁(yè)數(shù)： 46/84頁(yè)
文件大?。?/td> 861K
代理商： ST6375B1/XXX
50/84
ST6365, ST6375, ST6385 ST6367, ST6377, ST6387
ON-SCREEN DISPLAY (Cont’d)
OSD Global Enable Register (OGER)
Address: 17h, Page 6 - Write only
Caution: This register contains at least one write
only bit. Single bit instructions (SET, RES, INC
and DEC) should not be used.
This register contains the global enable bit (GE). It
is the only register that can be written at any time
regardless of the state of the GE bit. It is a write
only register.
Vertical Start Address Register (VSAR)
Address: 10h, Page 6 - Write only
Caution: This register contains at least one write
only bit. Single bit instructions (SET, RES, INC
and DEC) should not be used.
D7-D1. These bits are not used
GE. Global Enable. This bit allows the entire dis-
play to be turned off.
“0” - The entire display is disabled. The RAM and
other registers of the OSD can be accessed
by the Core.
“1” - Display of words is controlled by the word
enable bits (WE) located in the format or
space character. The other registers and
RAM cannot be accessed by the Core.
D7. This bit is not used
FR. Fringe Background. This bit changes the
background from a box background to a fringe
background. The background is enabled by word
as defined by either BG0 or BG1.
“0” - The background is defined to be a box which
is 7 x 9 dots.
“1” - The background is defined to be a fringe.
VSA5-VSA0. Vertical Start Address. These bits
determine the start position of the first line in the
vertical direction. The 6 bits can specify 63 display
start positions of interval 4H. The first start position
will be the fourth line of the display. The vertical
start address is defined VSA0 by the following for-
mula.
Vertical Start Address = 4H(25(VSA5) + 24(VSA4)
+ 23(VSA3) + 22(VSA2) + 21(VSA1) + 20(VSA0))
The case of all Vertical Start Address bits being
zero is illegal.
Horizontal Start Address Register (HSAR)
Address: 11h, Page 6 - Write only
Caution: This register contains at least one write
only bit. Single bit instructions (SET, RES, INC
and DEC) should not be used.
D7. This bit is not used.
SBD. Space Blanking Disable. This bit controls
whether or not the background is displayed when
outputing spaces. If two background colours are
used on adjacent words, then the background
should not be displayed on spaces in order to
make a nice break between colours. If an even
background around an area of text is desired, as in
a menu, then the background should be displayed
when outputing spaces.
“0” - The background during spaces is controlled
by the background enable bits (BG0 and
BG1) located in the Background Control
register.
“1” - The background is not displayed when out-
puting spaces.
HSA5, HSA0 - Horizontal Start Address bits.
These bits determine the start position of the first
character in the horizontal direction. The 6 bits can
specify 64 display start positions of interval 2/fOSC
or 400ns. The first start position will be at 4.0ms
because of the time needed to access RAM and
ROM before the first character can be displayed.
The horizontal start address is defined by the fol-
lowing formula.
Horizontal
Start
Address
=
2/fOSC(10.0 +
25(HSA5) + 24(HSA4) + 23(HSA3) + 22(HSA2) +
21(HSA1) + 20(HSA0))
70
--
-
GE
70
-
FR
VSA5
VSA4
VSA3
VSA2
VSA1
VSA0
70
-
SBD
HSA5
HSA4
HSA3
HSA2
HSA1
HSA0
相關(guān)PDF資料
PDF描述
ST6367B1/XXX 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDIP42
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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ST63-7-W1-22-9-120CS28 制造商:TE Connectivity 功能描述:E53797N001
ST63-7-W1-22-9-120CS2894 制造商:TE Connectivity 功能描述:
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