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參數(shù)資料
| 型號： | ST63T69B1 |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | 8-BIT HCMOS MCU FOR DIGITAL CONTROLLED MULTI FREQUENCYMONITOR |
| 中文描述： | 8位HCMOS單片機(jī)的數(shù)控多FREQUENCYMONITOR |
| 文件頁數(shù)： | 24/71頁 |
| 文件大?。?/td> | 584K |
| 代理商： | ST63T69B1 |
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RESET
IS RESET
STILL PRESENT
YES
NO
VA000427
NMI MASK SET
INT LATCH CLEARED
( IF PRESENT )
SELECT
NMI MODE FLAGS
PUT FFEh
ON ADDRESS BUS
LOAD PC
FROM RESET LOCATIONS
FFE / FFF
FETCH INSTRUCTION
Figure21. Reset & Interrupt Processing
Flow-Chart
JP
RESET VECTOR
INITIALIZATION
ROUTINE
JP: 2 BYTES/4 CYCLES
RETI: 1BYTES/2 CYCLES
RETI
VA000181
RESET
Figure 22. Restart Initialization Program
Flow-Chart
MCU InitializationSequence
When a reset occurs the stackis reset to program
counter, the PC is loaded with the addressof the
reset vector (located in the program ROM at ad-
dresses FFEH & FFFH). A jump instruction to the
beginning of the program has to be written into
these locations.After a reset the interrupt mask is
automatically activated so that the Core is in non-
maskable interrupt mode to prevent false or ghost
interrupts during the restart phase. Therefore the
restart routine should be terminated by a RETIin-
struction to switch to normal mode and enable in-
terrupts. If no pending interrupt is present at the
end of the reset routine, the ST6369 will continue
with the instruction after the RETI; otherwise the
pendinginterrupt will beserviced.
RESET Low Power Mode
When the reset pin is low, the quartz oscillator is
Disabled allowing reduced current consumption.
When the reset pin is raised the quartzoscillator is
enabled and oscillations will start to build up.The
internal reset circuitrywill count 2048clockson the
oscillator pin beforeallowingthe MCUto go out of
the resetstate;theclocks areafter aschmitt trigger
so thatfalse or multiplecounts arenot possible.
RESET
(Continued)
ST6369
20/67
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