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參數(shù)資料
| 型號： | ST63T69B1 |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | 8-BIT HCMOS MCU FOR DIGITAL CONTROLLED MULTI FREQUENCYMONITOR |
| 中文描述： | 8位HCMOS單片機(jī)的數(shù)控多FREQUENCYMONITOR |
| 文件頁數(shù)： | 68/71頁 |
| 文件大?。?/td> | 584K |
| 代理商： | ST63T69B1 |
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Symbol
Parameter
Test Conditions
Value
Unit
Min.
Typ.
Max.
t
WRES
Minimum Pulse Width
RESET Pin
125
ns
tO
HL
High to Low Transition Time
PA6, PA7
V
DD
= 5V, CL = 1000pF (2)
100
ns
tO
HL
High to Low Transition Time
DA0-DA5,
PB1-PB2, PB4-PB6
PC0-PC7
V
DD
= 5V, CL = 100pF
20
ns
tO
LH
Low to High Transition Time
PB1-PB2 , PB4-PB6,
PA0-PA3,
PC0-PC3
V
DD
= 5V, CL = 100pF
20
ns
tO
H
Data HOLD Time
SPI after clock goes low
I
2
CBUS/S-BUS Only
175
ns
f
DA
D/A Converter Repetition
Frequency
(1)
31.25
kHz
f
SIO
SIO Baud Rate
(1)
62.50
kHz
t
WEE
EEPROM Write Time
T
A
= 25
°
C, One Byte
5
10
ms
Endurance
EEPROM WRITE/ERASE Cycles
Q
A
L
OT
Acceptance Criteria
300.000
> 1
million
cycles
Retention
EEPROM DataRetention (4)
T
A
= 25
°
C
10
years
C
IN
Input Capacitance (3)
All Inputs Pins
10
pF
C
OUT
Output Capacitance (3)
All outputs Pins
10
pF
COSCIN,
COSCOUT
Oscillator Pins Internal
Capacitance(3)
5
pF
Notes:
1.
A clockother than8 MHz will affect the frequency response ofthose peripherals (D/A,62.5kHz and SPI)whose clockis
derived from the system clock.
The riseand falltimes of PORTA have been reduced inorder toavoid current spikes while maintaining a high drive capability
Not100% Tested
Based on extrapolated data
2.
3.
4.
AC ELECTRICALCHARACTERISTICS
(T
A
= 0 to +70
°
C, f
OSC
=8MHz,V
DD
=4.5 to 6.0V unless otherwise specified)
ST63E69,ST63T69
64/67
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