參數(shù)資料
型號： ST92E141K4D1
廠商： STMICROELECTRONICS
元件分類： 微控制器/微處理器
英文描述： 16-BIT, UVPROM, 25 MHz, MICROCONTROLLER, CDIP32
封裝： WINDOWED, SHRINK, CERAMIC, DIP-32
文件頁數(shù)： 171/178頁
文件大?。?/td> 1097K
代理商： ST92E141K4D1
92/178
ST92141 - STANDARD TIMER (STIM)
7.2 STANDARD TIMER (STIM)
Important Note: This chapter is a generic descrip-
tion of the STIM peripheral. Depending on the ST9
device, some or all of the interface signals de-
scribed may not be connected to external pins. For
the list of STIM pins present on the particular ST9
device, refer to the pinout description in the first
section of the data sheet.
7.2.1 Introduction
The Standard Timer includes a programmable 16-
bit down counter and an associated 8-bit prescaler
with Single and Continuous counting modes capa-
bility. The Standard Timer uses an input pin (STIN)
and an output (STOUT) pin. These pins, when
available, may be independent pins or connected
as Alternate Functions of an I/O port bit.
STIN can be used in one of four programmable in-
put modes:
– event counter,
– gated external input mode,
– triggerable input mode,
– retriggerable input mode.
STOUT can be used to generate a Square Wave
or Pulse Width Modulated signal.
The Standard Timer is composed of a 16-bit down
counter with an 8-bit prescaler. The input clock to
the prescaler can be driven either by an internal
clock equal to INTCLK divided by 4, or by
CLOCK2 derived directly from the external oscilla-
tor, divided by device dependent prescaler value,
thus providing a stable time reference independ-
ent from the PLL programming or by an external
clock connected to the STIN pin.
The Standard Timer End Of Count condition is
able to generate an interrupt which is connected to
one of the external interrupt channels.
The End of Count condition is defined as the
Counter Underflow, whenever 00h is reached.
Figure 51. Standard Timer Block Diagram
n
STOUT1
EXTERN AL
INPUT
&
CLOCK CONTROL LOGIC
INEN INMD1 INMD2
STP
8-BIT PRESCALER
STH,STL
16-BIT
STAN DARD TIMER
CLOCK
OUTMD1 OUTMD2
OUTPU T CONTROL LOGIC
INTER RUPT
CONTROL LOGIC
END OF
COUNT
INTS
INTERRUPT REQUEST
CLOCK2/x
STIN1
INTERRUPT
1
DOWNCOUNTER
(See Note 2)
Note 2: Depending on device, the source of the INPUT & CLOCK CONTROL LOGIC block
may be permanently connected either to STI N or the RCCU signal CLOCK2/x. In devices without STI N and CLOCK2, the
INTCLK/4
MUX
Note 1: Pin not present on all ST9 devices
.
INEN bit must be held at 0.
9
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