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參數(shù)資料
| 型號(hào)： | T7698 |
| 廠商： | Lineage Power |
| 英文描述： | Quad T1/E1 Line Interface and Octal T1/E1 Monitor(四T1/E1線接口和八T1/E1監(jiān)控器) |
| 中文描述： | 四T1/E1線路接口和八路的T1/E1監(jiān)視器（四個(gè)T1/E1線接口和八T1/E1的監(jiān)控器） |
| 文件頁數(shù)： | 46/112頁 |
| 文件大?。?/td> | 1359K |
| 代理商： | T7698 |
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Data Sheet
January 1999
T7698 Quad T1/E1 Line Interface and Octal T1/E1 Monitor
46
Lucent Technologies Inc.
Line Interface Units: Quad Line Interface Unit Registers
(continued)
Channel Configuration and Control Registers (0110—1001, 1011, 1100)
(continued)
* A numerical suffix identifies the channel number.
* A numerical suffix identifies the channel number.
Table 26. Channel Configuration Register (1011)
Bits
Symbol
*
Description
Channel Configuration Register
(11)
Reserved. Write to 0.
The CODE4 bit selects B8ZS/HDB3 encoding (transmit) and decoding
(receive) in channel 4.
Reserved. Write to 0.
The CODE3 bit selects B8ZS/HDB3 encoding (transmit) and decoding
(receive) in channel 3.
Reserved. Write to 0.
0—3
4
—
CODE4
5
6
—
CODE3
7
—
Table 27. Control Register (1100)
Bit
Symbol
*
Description
Control Register (12)
0
ALTIMER
The ALTIMER bit is used to select the time required to declare ALOS. ALTIMER = 0
selects 1 ms—2.6 ms. ALTIMER = 1 selects 10 bit—255 bit periods.
The RCVAIS bit selects the shutdown function for the receiver during analog loss of
signal alarm (ALOS). RCVAIS operates in conjunction with the LOSSD bit.
The PFLALM prevents the DLOS alarm from occurring during FLLOOP activation.
The PRLALM prevents the LOTC alarm from occurring during RLOOP activation/
deactivation.
The PHIZALM prevents the TDM alarm from occurring when the driver is in a high-
impedance state.
The JABW0 bit selects the lower bandwidth jitter attenuator option in CEPT mode.
The CODE2 bit selects B8ZS/HDB3 encoding (transmit) and decoding (receive) in
channel 2.
The CODE1 bit selects B8ZS/HDB3 encoding (transmit) and decoding (receive) in
channel 1.
1
RCVAIS
2
3
PFLALM
PRLALM
4
PHIZALM
5
6
JABW0
CODE2
7
CODE1
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