參數(shù)資料
型號: TAS5508BPAGR
廠商: TEXAS INSTRUMENTS INC
元件分類: 消費(fèi)家電
英文描述: SPECIALTY CONSUMER CIRCUIT, PQFP64
封裝: GREEN, PLASTIC, TQFP-64
文件頁數(shù): 47/103頁
文件大?。?/td> 1198K
代理商: TAS5508BPAGR
3.3.3.1 Using Line Outputs in 6-Channel Configurations
3.3.4
Recovery from Clock Error
3.3.5
Power-Supply Volume-Control Enable
3.3.6
Volume and Mute Update Rate
3.3.7
Modulation Index Limit
TAS5508B
8-Channel Digital Audio PWM Processor
SLES162C – DECEMBER 2005 – REVISED JULY 2009
www.ti.com
The audio system can be configured for a 6-channel configuration (with 2 lineouts) by writing a 1 to bit D1
of register 0xE0 (general control register). In this configuration, channel-5 and -6 processing are exactly
the same as the other channels, except that the master volume and the loudness function have no effect
on the signal.
Note that in 6-channel configuration, channels 5 and 6 are unaffected by back-end error (BKND_ERR
goes low).
To use channels 5 and 6 as unprocessed lineouts, the following setup is recommended:
Channel-5 volume and channel-6 volume should be set for a constant output, such as 0 dB.
Bass and treble for channels 5 and 6 can be used if desired.
DRC1 should be bypassed for channels 5 and 6.
If a down mix is desired on channels 5 and 6 as lineout, the down mixing can be performed using the
channel-5 and channel-6 input mixers.
The operation of the channel-5 and -6 biquads is unaffected by the 6-/8-channel configuration setting.
The TAS5508B can be set either to perform a volume ramp up during the recovery sequence of a clock
error or simply to come up in the last state (or desired state if a volume or tone update was in progress).
This feature is enabled via I2C system control register 0x03.
The power-supply volume control (PSVC) can be enabled and disabled via I2C register 0xE0. The
subwoofer PWM output is always controlled by the PSVC. When using PSVC the subwoofer cannot be
used as lineout.
The TAS5508B has fixed soft volume and mute ramp durations. The ramps are linear. The soft volume
and mute ramp rates are adjustable by programming the I2C register 0xD0 for the appropriate number of
steps to be 512, 1024, or 2048. The update is performed at a fixed rate regardless of the sample rate.
In normal speed, the update rate is 1 step every 4/f
S seconds.
In double speed, the update is 1 step every 8/f
S seconds.
In quad speed, the update is 1 step every 16/f
S seconds.
Because of processor loading, the update rate can increase for some increments by one step every 1/fS to
3/fS. However, the variance of the total time to go from 18 dB to mute is less than 25%.
Table 3-8. Volume Ramp Periods in ms
SAMPLE RATE (kHz)
NUMBER OF STEPS
44.1, 88.2, 176.4
32, 48, 96, 192
512
46.44
42.67
1024
92.88
85.33
2048
185.76
170.67
PWM modulation is a linear function of the audio signal. When the audio signal is 0, the PWM modulation
is 50%. When the audio signal increases toward full scale, the PWM modulation increases toward 100%.
For negative signals, the PWM modulations fall below 50% toward 0%.
However, the maximum possible modulation does have a limit. During the offtime period, the power stage
TAS5508B Controls and Status
48
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