參數(shù)資料
型號： TAS5508BPAGR
廠商： TEXAS INSTRUMENTS INC
元件分類： 消費家電
英文描述： SPECIALTY CONSUMER CIRCUIT, PQFP64
封裝： GREEN, PLASTIC, TQFP-64
文件頁數(shù)： 55/103頁
文件大?。?/td> 1198K
代理商： TAS5508BPAGR
4.7.4
TAS5508B Bus-Related Characteristics of the SDA and SCL I/O Stages for F/S-Mode
SDA
SCL
tf
tSU-DAT
tHD-STA
tr
tBUF
tSU-STO
P
S
tSP
tSU-STA
Sr
tHIGH
tHD-DAT
tLOW
tr
tHD-STA
S
tf
T0114-01
TAS5508B
8-Channel Digital Audio PWM Processor
www.ti.com
SLES162C – DECEMBER 2005 – REVISED JULY 2009
I
2C-Bus Devices
All values are referred to VIHmin and VILmax (see Section 4.7.3).
A
STANDARD MODE
FAST MODE
PARAMETER
TEST CONDITIONS
UNIT
MIN
MAX
MIN
MAX
fSCL
SCL clock frequency
0
100
0
400
kHz
Hold time (repeated) START condition.
tHD-STA
After this period, the first clock pulse is
4
0.6
s
generated.
tLOW
LOW period of the SCL clock
4.7
1.3
s
tHIGH
HIGH period of the SCL clock
4
0.6
s
tSU-STA
Setup time for repeated START
4.7
0.6
s
tSU-DAT
Data setup time
250
100
s
tHD-DAT
Data hold time (1)(2)
0
3.45
0
0.9
s
tr
Rise time of both SDA and SCL
1000 20 + 0.1 Cb
(3)
500(4)
ns
tf
Fall time of both SDA and SCL
300 20 + 0.1 Cb
(3)
300
ns
tSU-STO
Setup time for STOP condition
4
0.6
s
tBUF
Bus free time between a STOP and
4.7
1.3
s
START condition
Cb
Capacitive loads for each bus line
400
pF
VnL
Noise margin at the LOW level for each
0.1 VDD
V
connected device (including hysteresis)
VnH
Noise margin at the HIGH level for each
0.2 VDD
V
connected device (including hysteresis)
(1)
Note that SDA does not have the standard I2C specification 300-ns hold time and that SDA must be valid by the rising and falling edges
of SCL. TI recommends that a 3.3-k
pullup resistor be used to avoid potential timing issues.
(2)
A fast-mode I2C-bus device can be used in a standard-mode I2C-bus system, but the requirement tSU-DAT ≥ 250 ns must then be met.
This is automatically the case if the device does not stretch the LOW period of the SCL signal. If such a device does stretch the LOW
period of the SCL signal, it must output the next data bit to the SDA line tr-max + tSU-DAT = 1000 + 250 = 1250 ns (according to the
standard-mode I2C bus specification) before the SCL line is released.
(3)
Cb = total capacitance of one bus line in pF.
(4)
Rise time varies with pullup resistor.
Figure 4-2. Start and Stop Conditions Timing Waveforms
Electrical Specifications
55
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相關代理商/技術參數(shù)
參數(shù)描述
TAS5508BPAGRG4 功能描述:音頻 DSP 8 Ch Digital Audio PWM Processor RoHS:否 制造商:Texas Instruments 工作電源電壓: 電源電流: 工作溫度范圍: 安裝風格: 封裝 / 箱體: 封裝:Tube
TAS5508C 制造商:TI 制造商全稱:Texas Instruments 功能描述:8-Channel Digital Audio PWM Processor
TAS5508CPAG 功能描述:音頻 DSP 8Ch PWM Processor RoHS:否 制造商:Texas Instruments 工作電源電壓: 電源電流: 工作溫度范圍: 安裝風格: 封裝 / 箱體: 封裝:Tube
TAS5508CPAGR 功能描述:音頻 DSP 8Ch PWM Processor RoHS:否 制造商:Texas Instruments 工作電源電壓: 電源電流: 工作溫度范圍: 安裝風格: 封裝 / 箱體: 封裝:Tube
TAS5508CPAGR 制造商:Texas Instruments 功能描述:IC Digital Audio PWM Processor 64-TQFP
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