參數(shù)資料
型號: TAS5508BPAGR
廠商: TEXAS INSTRUMENTS INC
元件分類: 消費家電
英文描述: SPECIALTY CONSUMER CIRCUIT, PQFP64
封裝: GREEN, PLASTIC, TQFP-64
文件頁數(shù): 68/103頁
文件大?。?/td> 1198K
代理商: TAS5508BPAGR
6
Serial-Control I
2C Register Summary
TAS5508B
8-Channel Digital Audio PWM Processor
www.ti.com
SLES162C – DECEMBER 2005 – REVISED JULY 2009
The TAS5508B slave write address is 0x36 and the read address is 0x37. See Serial-Control Interface
Register Definitions, Section 7 for complete bit definitions.
Note that u indicates unused bits.
TOTAL
I2C
REGISTER FIELDS
DESCRIPTION OF CONTENTS
DEFAULT STATE
BYTES
SUBADDRESS
0x00
1
Clock control register
Set data rate and MCLK frequency
1. fS = 48 kHz
2. MCLK = 256 fS = 12.288 MHz
0x01
1
General status register
Clip indicator and ID code for the
0x03
TAS5508B
0x02
Reserved
1. PWM (dc blocking) high-pass filter enabled
PWM high pass, clock set, unmute
2. Auto clock set
0x03
1
System control register 1
select, PSVC select
3. Hard unmute on clock error recovery
4. PSVC Hi-Z disabled
1. Automute time-out disabled
2. Post-DAP detection automute enabled
0x04
1
System control register 2
Automute and de-emphasis control
3. 8-Ch device input detection automute enabled
4. Unmute threshold 6 dB over input
5. No de-emphasis
1. Enable back-end reset.
2. VALID low for reset
3. VALID low for mute
Channel configuration
Configure channels 1, 2, 3, 4, 5, 6, 7,
0x05–0x0C
1/reg.
4. Normal BEPolarity
control registers
and 8
5. Do not remap the output for the TAS5182.
6. Do not go low-low in mute.
7. Do not remap Hi-Z state to low-low state.
1. Disable back-end reset sequence.
2. VALID does not have to be low for reset.
3. VALID does not have to be low for mute.
Headphone configuration
0x0D
1
Configure headphone output
4. Normal BEPolarity
control register
5. Do not remap output to comply with TAS5182.
6. Do not go low-low in mute.
7. Do not remap Hi-Z state to low-low state.
0x0E
1
Serial data interface control
Set serial data interface to
24-bit I2S
register
right-justified, I2S, or left-justified.
0x0F
1
Soft mute register
Soft mute for channels 1, 2, 3, 4, 5, 6,
Unmute all channels.
7, and 8
0x10–0x13
Reserved
0x14
1
Automute control register
Set automute delay and threshold.
1. Set automute delay = 5 ms.
2. Set automute threshold less than bit 8.
0x15
1
Automute PWM threshold
Set PWM automute threshold; set
1. Set the PWM threshold the same as the
and back-end reset period
back-end reset period.
TAS5508B input threshold.
register
2. Set back-end reset period = 5 ms.
0x16
1
Modulation index limit
Set modulation index.
97.7%
register
0x17–0x3F
Reserved
0x40
4
Bank-switching command
Set up DAP coefficients bank
Manual selection – bank 1
register
switching for banks 1, 2, and 3
SDIN1 – left to input mixer 1
SDIN1 – right to input mixer 2
SDIN2 – left to input mixer 3
Input mixer registers,
SDIN2 – right to input mixer 4
0x41–0x48
32/reg.
8
×8 input crossbar mixer setup
Ch1–Ch8
SDIN3 – left to input mixer 5
SDIN3 – right to input mixer 6
SDIN4 – left to input mixer 7
SDIN4 – right to input mixer 8
0x49
4
ipmix_1_to_ch8
Input mixer 1 to Ch8 mixer coefficient
0.0
0x4A
4
ipmix_2_to_ch8
Input mixer 2 to Ch8 mixer coefficient
0.0
0x4B
4
ipmix_7_to_ch2
Input mixer 7 to Ch2 mixer coefficient
0.0
0x4C
4
Ch7_bp_bq2
Bypass Ch7 biquad 2 coefficient
0.0
0x4D
4
Ch7_bq2
Ch7 biquad 2 coefficient
1.0
0x4E
4
ipmix_8_to_ch12
Ch8 biquad 2 output to Ch1 mixer and
0.0
Ch2 mixer coefficient
67
Serial-Control I2C Register Summary
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