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參數(shù)資料
| 型號(hào)： | TDA9109N |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | LOW-COST DEFLECTION PROCESSOR FOR MULTISYNC MONITORS |
| 中文描述： | 低費(fèi)用偏轉(zhuǎn)處理器多同步監(jiān)測(cè)儀 |
| 文件頁(yè)數(shù)： | 11/32頁(yè) |
| 文件大?。?/td> | 303K |
| 代理商： | TDA9109N |
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B+SECTION
Operating Conditions
Symbol
FeedRes
Parameter
Testconditions
Min.
5
Typ.
Max.
Unit
k
Minimum Feedback Resistor
Resistor between Pins 15 and 14
ElectricalCharacteristics
(V
CC
= 12V,T
amb
= 25
o
C)
Symbol
Parameter
OLG
Error Amplifier Open Loop Gain
UGBW
Unity Gain Bandwidth
IRI
Regulation Input Bias Current
EAOI
Error Amplifier Output Current
Testconditions
Min.
Typ.
85
6
0.2
Max.
Unit
dB
MHz
μ
A
mA
mA
At lowfrequency (see Note 16)
(see Note 16)
Current sourced by Pin 15 (PNP base)
Current sourced by Pin 14
Current sunk by Pin14
Pin 16
Pin 16
0.5
2
CSG
MCEth
Current Sense InputVoltage Gain
Max CurrentSense InputThreshold
Voltage
Current Sense InputBias Current
Maximum ON Time of the external
power transistor
B+ Output Saturation Voltage
Internal Reference Voltage
3
1.2
V
ISI
Current sunk by Pin16 (NPN base)
% of Horizontal period,
f
0
= 27kHz (see Note 17)
V
28
with I
28
= 10mA
Onerroramp(+) inputforSubaddress 0B
Byte 1000000
Byte 1111111
Byte 0000000
Pin 16
1
μ
A
%
Tonmax
100
B+OSV
IV
REF
0.25
4.8
V
V
V
REFADJ
Internal
Adjustment Range
Reference
Voltage
+20
-20
6
%
%
V
PWMSEL Threshold for step-up/step-down
selection
t
FB+
Fall Time
Pin 28
100
ns
Notes : 16. These parameters are not tested on each unit. They are measured during our internal qualification procedure which includes
characterization on batches coming from corners of our processes and also temperature characterization.
17. The external power transistor is OFFduring 400ns of the HFOCUSCAP discharge.
9
HDF
DC
A
B
VDF
AMP
9
Figure 1 :
VerticalDynamic Focus Function
DHPC
DC
A
B
SPB
PARA
9
Figure 3 :
DynamicHorizontal Phase Control
Output
EW
DC
A
B
EW
PARA
9
Figure 2 :
E/WOutput
Keyadj
9
Figure 4 :
KeystoneEffect on E/W Output
(PCCInhibited)
TDA9109/N
11/32
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