參數(shù)資料
型號: TH58100FT
廠商: Toshiba Corporation
英文描述: TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS
中文描述: 馬鞍山暫定東芝數(shù)字集成電路硅柵CMOS
文件頁數(shù): 40/43頁
文件大?。?/td> 421K
代理商: TH58100FT
TH58100FT
2001-03-05 40/43
(12)
Several programming cycles on the same page (Partial Page Program)
A page can be divided into up to 3 segments. Each segment can be programmed individually as follows:
(13)
Note regarding the
RE
signal
RE
The internal column address counter is incremented synchronously with the
RE
clock in Read mode.
Therefore, once the device has been set to Read mode by a “00H”, “01H” or “50H” command, the internal
column address counter is incremented by the
RE
clock independently of the address input timing, If the
RE
clock input pulses start before the address input, and the pointer reaches the last column address, an
internal read operation (array to register) will occur and the device will enter Busy state. (Refer to Figure 25.)
Hence the
RE
clock input must start after the address input.
Data Pattern 3
Data Pattern 1
All 1s
Figure 24.
1st programming
2nd programming
nth programming
Result
Data Pattern 1
Data Pattern 3
Data Pattern 2
All 1s
Data Pattern 2
All 1s
Note: The input data for unprogrammed or previously programmed page segments must be “1”
(i.e. the inputs for all page bytes outside the segment which is to be programmed should be set to all “1”).
All 1s
Figure 25.
Address input
WE
I/O
BY
/
RY
RE
00H/01H/50H
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