參數(shù)資料
型號: THS8083-95CPZP
廠商: TEXAS INSTRUMENTS INC
元件分類: 消費家電
英文描述: SPECIALTY CONSUMER CIRCUIT, PQFP100
封裝: POWER, THERMALLY ENHANCED, PLASTIC, TQFP-100
文件頁數(shù): 39/61頁
文件大小: 239K
代理商: THS8083-95CPZP
4–4
4.4
Timing Diagram – 48-Bit Parallel Mode
This mode allows a double-pixel width output interface with no time offset between buses A and B. The DATACLK1
output is at half of the sampling clock frequency.
DATACLK
CH1_OUTA[7..0]
CH2_OUTA[7..0]
CH2_OUTB[7..0]
CH1_OUTB[7..0]
CH3_OUTA[7..0]
CH3_OUTB[7..0]
HS
7 ADCCLK2 cycles latency
pix 01
01
03
last samples from previous line
7 ADCCLK2
cycles latency
pix 02
ADCCLK2
OE
DHS
(DHS_POL=0 assumed –
inverted polarityotherwise)
<DHS_MODE> = 0 –> DHS width is 1
<DHS_MODE> = 1 –> width equal to
last samples from previous line
01
03
01
03
01
03
01
03
01
03
width of HS input
ADCCLK2 period
th(OUT)
tsu(OUT)
tPLH(OE)
tPHL(OE)
tsu(DHS)
th(DHS)
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