參數(shù)資料
型號: TLE6266G
廠商: INFINEON TECHNOLOGIES AG
元件分類: 模擬信號調(diào)理
英文描述: SPECIALTY ANALOG CIRCUIT, PDSO28
封裝: 18 MM, PLASTIC, SOP-28
文件頁數(shù): 14/50頁
文件大小: 1020K
代理商: TLE6266G
Datasheet TLE 6266 G
Version 2.21
21
July 29th, 2005
are depending on timing.(e.g. to switch on/off a LED after a certain number of cyclic HS
ON conditions). During the long open window the timebase test is not available.
To measure the internal cyclic timing, the SPI input bit 3 and 4 have to be set HIGH. Then
the HS3 switch is automatically enabled for 3 times during the closed window of the
watchdog (see Figure 7). A correct SPI input word (with IBit 3 and 4 set HIGH) has to
be read in first, to activate the timebase test. Due to he fact, that the input command gets
activated after the CSN LOW to HIGH transition, it takes t=tSYNC to activate the timebase
test. If this SPI input command is given within the open window, tSYNC=max 500ns. If the
command is given during closed window (this is not a watchdog trigger command) the
synchronisation tSYNC can last up to 500s.
Figure 7
Timebase Test Diagram
6.16
Flash program mode
To disable the watchdog feature a flash program mode is available. This mode is
selected by applying a voltage of 6.8V < VPWM < 7.2V at pin PWM. This is useful e.g. if
the flash-memory of the micro has to be programmed and therefore a regular watchdog
triggering is not possible. If the SPI is required in the flash program mode to change e.g.
the mode of the TLE6266, the first input telegram has to be “00000000”.
HS3
t
closed window (12 cycles)
OFF
ON
2cycl.
CSN
t
t
SYNC
SPI Input word with
timebase test
command
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