參數(shù)資料
型號(hào)： TLE6266G
廠商： INFINEON TECHNOLOGIES AG
元件分類(lèi)： 模擬信號(hào)調(diào)理
英文描述： SPECIALTY ANALOG CIRCUIT, PDSO28
封裝： 18 MM, PLASTIC, SOP-28
文件頁(yè)數(shù)： 47/50頁(yè)
文件大小： 1020K
代理商： TLE6266G
Datasheet TLE 6266 G
Version 2.21
6
July 29th, 2005
18
DI
SPI interface Data In; DI receives serial data from the control
device. Serial data transmitted to DI is a 16 bit control word with
the Least Significant Bit (LSB) transferred first. The input has an
active pull down and requires CMOS logic level inputs. DI will
accept data on the falling edge of CLK-signal; see Table 6 for
input data protocol and Figure 11 for more details.
19
CLK
SPI interface clock input; clocks the shiftregister; CLK has an
internal active pull down and requires CMOS logic level inputs
24
VCC
Output voltage regulator; 5V logic supply, block to GND with an
100nF external ceramic capacitor directly at the IC + external
capacitor CQ ≥ 22 F
25
RxD
CAN Receive data output; push-pull output;
LOW: bus becomes dominant, HIGH: bus becomes recessive
26
TxD
CAN Transmit data input; integrated pull up;
LOW: bus becomes dominant, HIGH: bus becomes recessive
27
PWM
Pulse Width Modulation control; integrated pull down, active
HIGH. To PWM-control highside-switch HS1
28
WK
Wake-Up input; for detection of external wake-up events within
cyclic wake mode, integrated pull down, active HIGH, switches on
rising edge
4
Pin Definitions and Functions (cont’d)
Pin No.
Symbol
Function
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