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參數(shù)資料
| 型號： | TLV320AIC33IZQE |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PBGA80 |
| 封裝： | 5 X 5 MM, ROHS COMPLIANT, PLASTIC, VFBGA-80 |
| 文件頁數(shù)： | 39/93頁 |
| 文件大小： | 1427K |
| 代理商： | TLV320AIC33IZQE |
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To Detection block
HPLOUT
HPLCOM
HPROUT
HPRCOM
MICDET
This switch closes when
jack is removed
GENERAL PURPOSE I/O
CONTROL REGISTERS
SLAS480B – JANUARY 2006 – REVISED DECEMBER 2008 ........................................................................................................................................... www.ti.com
Figure 38. Configuration of device for jack detection using a fully differential stereo headphone output
connection.
AIC33 has two dedicated pins for General Purpose IO. These pins can be used to read status of external signals
through register read when configured as General Purpose Input. When configured as General Purpose Output ,
these pins can also drive logic high or low. Besides these standard GPIO functions, these pins can also be used
in a variety of ways such as output for internal clocks and interrupt signals. AIC33 generates a variety of
interrupts of use to the host processor such interrupts on jack detection, button press, short circuit detection and
AGC noise detection. All these interrupts can be routed individually to the GPIO pins or can be combined by a
logical OR. In case of a combined interrupt, user can read an internal status register to find the actual cause of
interrupt. When configured as interrupt, AIC33 also offers the flexibility of generating a single pulse or a train of
pulses till the interrupt status register is read by the user.
The control registers for the TLV320AIC33 are described in detail below. All registers are 8 bit in width, with D7
referring to the most significant bit of each register, and D0 referring to the least significant bit.
Page 0 / Register 0:
Page Select Register
BIT(1)
READ/
RESET
DESCRIPTION
WRITE
VALUE
D7–D1
X
0000000
Reserved, write only zeros to these register bits
D0
R/W
0
Page Select Bit
Writing zero to this bit sets Page-0 as the active page for following register accesses. Writing a
one to this bit sets Page-1 as the active page for following register accesses. It is recommended
that the user read this register bit back after each write, to ensure that the proper page is being
accessed for future register read/writes.
(1)
When resetting registers related to routing and volume controls of output drivers, it is recommended to reset them by writing directly to
the registers instead of using software reset.
44
Copyright 2006–2008, Texas Instruments Incorporated
Product Folder Link(s): TLV320AIC33
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| TLV320AIC33NIZQE | 制造商:Texas Instruments 功能描述: |
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