參數(shù)資料
型號(hào)： TLV320AIC33IZQER
廠商： TEXAS INSTRUMENTS INC
元件分類： 消費(fèi)家電
英文描述： SPECIALTY CONSUMER CIRCUIT, PBGA80
封裝： 5 X 5 MM, ROHS COMPLIANT, PLASTIC, VFBGA-80
文件頁數(shù)： 66/93頁
文件大?。?/td> 1427K
代理商： TLV320AIC33IZQER
www.ti.com ........................................................................................................................................... SLAS480B – JANUARY 2006 – REVISED DECEMBER 2008
Page 0 / Register 80:
LINE2L to LEFT_LOP/M Volume Control Register
BIT
READ/
RESET
DESCRIPTION
WRITE
VALUE
D7
R/W
0
LINE2L Output Routing Control
0: LINE2L is not routed to LEFT_LOP/M
1: LINE2L is routed to LEFT_LOP/M
D6-D0
R/W
0000000
LINE2L to LEFT_LOP/M Analog Volume Control
For 7-bit register setting versus analog gain values, see Table 4
Page 0 / Register 81:
PGA_L to LEFT_LOP/M Volume Control Register
BIT
READ/
RESET
DESCRIPTION
WRITE
VALUE
D7
R/W
0
PGA_L Output Routing Control
0: PGA_L is not routed to LEFT_LOP/M
1: PGA_L is routed to LEFT_LOP/M
D6-D0
R/W
0000000
PGA_L to LEFT_LOP/M Analog Volume Control
For 7-bit register setting versus analog gain values, see Table 4
Page 0 / Register 82:
DAC_L1 to LEFT_LOP/M Volume Control Register
BIT
READ/
RESET
DESCRIPTION
WRITE
VALUE
D7
R/W
0
DAC_L1 Output Routing Control
0: DAC_L1 is not routed to LEFT_LOP/M
1: DAC_L1 is routed to LEFT_LOP/M
D6-D0
R/W
0000000
DAC_L1 to LEFT_LOP/M Analog Volume Control
For 7-bit register setting versus analog gain values, see Table 4
Page 0 / Register 83:
LINE2R to LEFT_LOP/M Volume Control Register
BIT
READ/
RESET
DESCRIPTION
WRITE
VALUE
D7
R/W
0
LINE2R Output Routing Control
0: LINE2R is not routed to LEFT_LOP/M
1: LINE2R is routed to LEFT_LOP/M
D6-D0
R/W
0000000
LINE2R to LEFT_LOP/M Analog Volume Control
For 7-bit register setting versus analog gain values, see Table 4
Page 0 / Register 84:
PGA_R to LEFT_LOP/M Volume Control Register
BIT
READ/
RESET
DESCRIPTION
WRITE
VALUE
D7
R/W
0
PGA_R Output Routing Control
0: PGA_R is not routed to LEFT_LOP/M
1: PGA_R is routed to LEFT_LOP/M
D6-D0
R/W
0000000
PGA_R to LEFT_LOP/M Analog Volume Control
For 7-bit register setting versus analog gain values, see Table 4
Page 0 / Register 85:
DAC_R1 to LEFT_LOP/M Volume Control Register
BIT
READ/
RESET
DESCRIPTION
WRITE
VALUE
D7
R/W
0
DAC_R1 Output Routing Control
0: DAC_R1 is not routed to LEFT_LOP/M
1: DAC_R1 is routed to LEFT_LOP/M
D6-D0
R/W
0000000
DAC_R1 to LEFT_LOP/M Analog Volume Control
For 7-bit register setting versus analog gain values, see Table 4
Copyright 2006–2008, Texas Instruments Incorporated
69
Product Folder Link(s): TLV320AIC33
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