參數(shù)資料
型號(hào)： TLV320AIC33IZQER
廠商： TEXAS INSTRUMENTS INC
元件分類： 消費(fèi)家電
英文描述： SPECIALTY CONSUMER CIRCUIT, PBGA80
封裝： 5 X 5 MM, ROHS COMPLIANT, PLASTIC, VFBGA-80
文件頁(yè)數(shù)： 67/93頁(yè)
文件大小： 1427K
代理商： TLV320AIC33IZQER
www.ti.com ........................................................................................................................................... SLAS480B – JANUARY 2006 – REVISED DECEMBER 2008
ELECTRICAL CHARACTERISTICS (continued)
At 25°C, AVDD, DRVDD, IOVDD = 3.3 V, DVDD = 1.8 V, Fs = 48-kHz, 16-bit audio data (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
MICROPHONE BIAS
2.0
2.25
2.5
2.75
Bias voltage
Programmable settings, load = 750
V
AVDD-
0.2
Current sourcing
2.5 V setting
4
mA
AUDIO DAC
Differential Line output, load = 10 k
, 50 pF
1.414
VRMS
Full-scale differential output
0-dB gain to line outputs. DAC output common-mode
voltage
setting = 1.35 V, output level control gain = 0-dB
4.0
VPP
Signal-to-noise ratio,
Fs = 48 kHz, 0-dB gain to line outputs, zero signal
90
100
dB
A-weighted(3)
applied, referenced to full-scale input level
Fs = 48 kHz, 0-dB gain to line outputs,
Dynamic range, A-weighted
100
dB
1 kHz –60 dB signal applied
Total harmonic distortion
Fs = 48 kHz, 1 kHz 0 dB input signal applied
–93
–75
dB
Power supply rejection ratio
234 Hz, 100 mVpp on AVDD, DRVDD1/2
81
dB
DAC channel separation (left to
1-kHz, 0-dB
–100
dB
right)
DAC interchannel gain mismatch
1 kHz input, 0dB gain
0.1
dB
DAC Gain Error
1 kHz input, 0dB gain
–0.4
dB
DAC DIGITAL INTERPOLATION
Fs = 48-kHz
FILTER
Passband
High-pass filter disabled
0.45×Fs
Hz
Passband ripple
High-pass filter disabled
±0.06
dB
Transition band
0.45×Fs
0.55×Fs
Hz
Stopband
0.55×Fs
7.5×Fs
Hz
Stopband attenuation
65
dB
Group delay
21/Fs
Sec
STEREO HEADPHONE DRIVER
AC-coupled output configuration(3)
0-dB gain to high power outputs. Output
0-dB full-scale output voltage
0.707
VRMS
common-mode voltage setting = 1.35 V
First option
1.35
Programmable output common
Second option
1.50
mode voltage (applicable to Line
V
Third option
1.65
Outputs also)
Fourth option
1.8
Maximum programmable output
9
dB
level control gain
Programmable output level
1
dB
control gain step size
RL = 32
15
PO
Maximum output power
mW
RL = 16
30
Signal-to-noise ratio,
94
dB
A-weighted(4)
(3)
Unless otherwise noted, all measurements use output common-mode voltage setting of 1.35 V, 0-dB output level control gain, 16-
single-ended load.
(4)
Ratio of output level with a 1-kHz full-scale input, to the output level playing an all-zero signal, measured A-weighted over a 20-Hz to
20-kHz bandwidth.
Copyright 2006–2008, Texas Instruments Incorporated
7
Product Folder Link(s): TLV320AIC33
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