參數(shù)資料
型號: TMS320C6414TBCLZ6
廠商: Texas Instruments
文件頁數(shù): 63/146頁
文件大小: 0K
描述: IC DSP FIXED POINT 532FC/CSP
標準包裝: 60
系列: TMS320C6414T/15T/16T
類型: 定點
接口: 主機接口,McBSP,PCI,UTOPIA
時鐘速率: 600MHz
非易失內(nèi)存: 外部
芯片上RAM: 1.03MB
電壓 - 輸入/輸出: 3.30V
電壓 - 核心: 1.10V
工作溫度: 0°C ~ 90°C
安裝類型: 表面貼裝
封裝/外殼: 532-BFBGA,F(xiàn)CCSP
供應(yīng)商設(shè)備封裝: 532-FC/CSP(23x23)
包裝: 管件
TMS320C6414T, TMS320C6415T, TMS320C6416T
FIXEDPOINT DIGITAL SIGNAL PROCESSORS
SPRS226M NOVEMBER 2003 REVISED APRIL 2009
23
POST OFFICE BOX 1443
HOUSTON, TEXAS 772511443
peripheral register descriptions (continued)
Table 14. Timer 0 Registers
HEX ADDRESS RANGE
ACRONYM
REGISTER NAME
COMMENTS
0194 0000
CTL0
Timer 0 control register
Determines the operating
mode of the timer, monitors the
timer status, and controls the
function of the TOUT pin.
0194 0004
PRD0
Timer 0 period register
Contains the number of timer
input clock cycles to count.
This number controls the
TSTAT signal frequency.
0194 0008
CNT0
Timer 0 counter register
Contains the current value of
the incrementing counter.
0194 000C 0197 FFFF
Reserved
Table 15. Timer 1 Registers
HEX ADDRESS RANGE
ACRONYM
REGISTER NAME
COMMENTS
0198 0000
CTL1
Timer 1 control register
Determines the operating
mode of the timer, monitors the
timer status, and controls the
function of the TOUT pin.
0198 0004
PRD1
Timer 1 period register
Contains the number of timer
input clock cycles to count.
This number controls the
TSTAT signal frequency.
0198 0008
CNT1
Timer 1 counter register
Contains the current value of
the incrementing counter.
0198 000C 019B FFFF
Reserved
Table 16. Timer 2 Registers
HEX ADDRESS RANGE
ACRONYM
REGISTER NAME
COMMENTS
01AC 0000
CTL2
Timer 2 control register
Determines the operating
mode of the timer, monitors the
timer status, and controls the
function of the TOUT pin.
01AC 0004
PRD2
Timer 2 period register
Contains the number of timer
input clock cycles to count.
This number controls the
TSTAT signal frequency.
01AC 0008
CNT2
Timer 2 counter register
Contains the current value of
the incrementing counter.
01AC 000C 01AF FFFF
Reserved
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