- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄385940 > TMS320LC546 (Texas Instruments, Inc.) Digital Signal Processors(20/25ns指令周期， 高性能，大并行度，特殊指令集可有效實現(xiàn)多種復(fù)雜算法及應(yīng)用的DSP) PDF資料下載
參數(shù)資料
| 型號： | TMS320LC546 |
| 廠商： | Texas Instruments, Inc. |
| 元件分類： | 數(shù)字信號處理 |
| 英文描述： | Digital Signal Processors(20/25ns指令周期， 高性能，大并行度，特殊指令集可有效實現(xiàn)多種復(fù)雜算法及應(yīng)用的DSP) |
| 中文描述： | 數(shù)字信號處理器（20/25ns指令周期，高性能，大并行度，特殊指令集可有效實現(xiàn)多種復(fù)雜算法及應(yīng)用的數(shù)字信號處理器） |
| 文件頁數(shù)： | 23/107頁 |
| 文件大小： | 2149K |
| 代理商： | TMS320LC546 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁當(dāng)前第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁
TMS320C54x, TMS320LC54x
FIXED-POINT DIGITAL SIGNAL PROCESSORS
SPRS039A – FEBRUARY 1996 – REVISED JULY 1997
20
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
bus structure (continued)
The ’C548 device also has equivalent bus keepers connected to the address bus. The bus keepers ensure the
address bus does not float when in high-impedance. For the ’C548 device, the bus keepers are always enabled.
Table 2 summarizes the buses used by various types of accesses.
Table 2. Bus Usage for Accesses
ACCESS TYPE
ADDRESS BUS
PROGRAM
BUS
DATA BUS
PAB
√
√
CAB
DAB
EAB
PB
√
CB
DB
EB
Program read
Program write
√
Data single read
√
√
√
√
Data dual read
√
√
Data long (32-bit) read
√
(hw)
√
(lw)
√
(hw)
√
(lw)
Data single write
√
√
√
√
Data read/data write
√
√
√
√
√
√
Dual read/coefficient read
√
√
√
√
Peripheral read
Peripheral write
Legend:
hw = high 16-bit word
lw = low 16-bit word
√
√
memory
The total memory address range for the host of ’C54x/’LC54x devices is 192K 16-bit words. The ’LC548 has
8M-word program memory. The memory space is divided into three specific memory segments: 64K-word
program, 64K-word data, and 64K-word I/O. The program memory space contains the instructions to be
executed as well as tables used in execution. The data memory space stores data used by the instructions. The
I/O memory space interfaces to external memory-mapped peripherals and can also serve as extra data storage
space.
The parallel nature of the architecture of these DSPs allows them to perform four concurrent memory operations
in any given machine cycle: fetching an instruction, reading two operands, and writing an operand. The four
parallel buses are the program-read bus (PB), the data-write bus (EB) and the two data-read buses (CB and
DB). Each bus accesses different memory spaces for different aspects of the DSP’s operation. Additionally, this
architecture allows dual-operand reads, 32-bit-long word accesses, and a single read with a parallel store.
The ’C54x/’LC54x DSPs include on-chip memory to aid in system performance and integration.
on-chip ROM
The ’C541 and ’LC541 feature a 28K-word
×
16-bit on-chip maskable ROM. 8K words of the ’C541 and ’LC541
ROM can be mapped into program and data memory space if the data ROM (DROM) bit in the processor mode
status (PMST) register is set. This allows an instruction to use data stored in the ROM as an operand.
The ’LC545/’LC546 all feature a 48K-word
×
16-bit on-chip maskable ROM. 16K words of the ROM on these
devices can be mapped into program and data memory space if the DROM bit in the PMST register is set.
The ’C542/’LC542/’LC543/ ’LC548 all feature 2K-word
×
16-bit on-chip ROM.
Customers can arrange to have the ROM of the ’C54x/’LC54x programmed with contents unique to any
particular application.
A
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| TMS320LC57S | Digital Signal Processors(35/50ns指令周期，并行邏輯單元，可編程PLL，全雙工同步串行口的DSP) |
| TMS320UVC5409 | Fixed-Point Digital Signal Processor(定點DSP) |
| TMS320VC203 | Digital Signal Processors(50ns指令周期， 空閑狀態(tài)CPU全關(guān)斷，先進的外圍，多種PLL可選) |
| TN-83 | MICROWAVE NOISE TUBES & NOISE SOURCES |
| TN-101 | CONNECTOR ACCESSORY |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TMS320LC546APZ-50 | 功能描述:IC FIXED POINT DSP 100-LQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - DSP（數(shù)字式信號處理器） 系列:TMS320C54x 標(biāo)準(zhǔn)包裝:2 系列:StarCore 類型:SC140 內(nèi)核 接口:DSI，以太網(wǎng)，RS-232 時鐘速率:400MHz 非易失內(nèi)存:外部 芯片上RAM:1.436MB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:-40°C ~ 105°C 安裝類型:表面貼裝 封裝/外殼:431-BFBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:431-FCPBGA（20x20） 包裝:托盤 |
| TMS320LC546APZ-66 | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Texas Instruments 功能描述: |
| TMS320LC548GGU-66 | 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC Dig Signal Proc RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT |
| TMS320LC548GGU-80 | 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC Dig Signal Proc RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT |
| TMS320LC548PGE-66 | 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC Dig Signal Proc RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。