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5.10
External Memory Interface (EMIF)
5.10.1
Asynchronous EMIF (EMIFA)
TMS320DM6446
Digital Media System on-Chip
SPRS283–DECEMBER 2005
DM6446 supports several memory and external device interfaces, including:
Asynchronous EMIF (EMIFA) for interfacing to NOR Flash, SRAM, etc.
NAND Flash
ATA/CF
The DM6446 Asynchronous EMIF (EMIFA) provides an 8-bit or 16-bit data bus, an address bus width up
to 24-bits, and 4 dedicated chip selects, along with memory control signals. These signals are multiplexed
between three peripherals:
EMIFA and NAND interfaces
ATA/CF
Host Port Interface
5.10.1.1
NAND (NAND, SmartMedia, xD)
The EMIFA interface provides both the asynchronous EMIF and NAND interfaces. Four chip selects are
provided and each are individually configurable to provide either EMIFA or NAND support. The NAND
features supported are as follows.
NAND flash on up to 4 asynchronous chip selects.
8 and 16-bit data bus widths.
Programmable cycle timings.
Performs ECC calculation.
NAND Mode also supports SmartMedia/SSFDC (Solid State Floppy Disk Controller) and xD memory
cards
ARM ROM supports booting of the DM6446 ARM processor from NAND flash located at CS0
The memory map for EMIFA and NAND registers is shown in
Table 5-29
. For more details on the EMIFA
and NAND interfaces, see the
Documentation Support
for the DM6446 Asynchronous External Memory
Interface (EMIF) User's Guide.
Table 5-29. EMIFA/NAND Registers
HEX ADDRESS RANGE
0x01E0 0000 - 0x01E0 0003
0x01E0 0004
0x01E0 0008 - 0x01E0 000F
0x01E0 0010
0x01E0 0014
0x01E0 0018
0x01E0 001C
0x01E0 0020 - 0x01E0 003F
0x01E0 0040
0x01E0 0044
0x01E0 0048
0x01E0 004C
0x01E0 0050 - 0x01E0 005F
0x01E0 0060
0x01E0 0064
0x01E0 0070
0x01E0 0074
ACRONYM
REGISTER NAME
Reserved
Asynchronous Wait Cycle Configuration Register
Reserved
Asynchronous 1 Configuration Register (CS2 Space)
Asynchronous 2 Configuration Register (CS3 Space)
Asynchronous 3 Configuration Register (CS4 Space)
Asynchronous 4 Configuration Register (CS5 Space)
Reserved
EMIF Interrupt Raw Register
EMIF Interrupt Mask Register
EMIF Interrupt Mask Set Register
EMIF Interrupt Mask Clear Register
Reserved
NAND Flash Control Register
NAND Flash Status Register
NAND Flash 1 ECC Register (CS2 Space)
NAND Flash 2 ECC Register (CS3 Space)
AWCCR
A1CR
A2CR
A3CR
A4CR
-
EIRR
EIMR
EIMSR
EIMCR
-
NANDFCR
NANDFSR
NANDF1ECC
NANDF2ECC
126
Peripheral and Electrical Specifications