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TMS320TCI6482
Communications Infrastructure Digital Signal Processor
SPRS246F–APRIL 2005–REVISED MAY 2007
Table 2-3. Terminal Functions (continued)
SIGNAL
NAME
TYPE
(1)
IPD/IPU
(2)
DESCRIPTION
NO.
URADDR2/PINTA
(5)
/
GP[14]
URADDR1/PRST/
GP[13]
URADDR0/PGNT/
GP[12]
UTOPIA received address pin 2 (URADDR2) (
I
) or PCI interrupt A (
O/Z
) or
GP[14] (
I/O/Z
) default]
UTOPIA received address pin 1 (URADDR1) (
I
) or PCI reset (
I
) or
GP[13] (
I/O/Z
) [default]
UTOPIA received address pin 0 (URADDR0) (
I
) or PCI bus grant (
I
) or
GP[12] (
I/O/Z
)[default]
UTOPIA received address pin 4 (URADDR4) (
I
) or PCI command/byte enable 0
(
I/O/Z
) or
GP[2] (
I/O/Z
)[default]
UTOPIA transmit address pin 2 (UXADDR2) (
I
) or PCI command/byte enable 3
(
I/O/Z
). By default, this pin has no function.
UTOPIA transmit address pin 1 (UXADDR1) (
I
) or PCI initialization device
select (
I
). By default, this pin has no function.
UTOPIA transmit address pin 0 (UXADDR0) (
I
) or PCI target ready (PRTDY)
(
I/O/Z
). By default, this pin has no function.
P3
I/O/Z
R5
I/O/Z
R4
I/O/Z
URADDR4/PCBE0/
GP[2]
P1
I/O/Z
UXADDR2/PCBE3
P5
I/O/Z
UXADDR1/PIDSEL
R3
I
UXADDR0/PTRDY
P4
I/O/Z
HD31/AD31
HD30/AD30
HD29/AD29
HD28/AD28
HD27/AD27
HD26/AD26
HD25/AD25
HD24/AD24
HD23/AD23
HD22/AD22
HD21/AD21
HD20/AD20
HD19/AD19
HD18/AD18
HD17/AD17
HD16/AD16
HD15/AD15
HD14/AD14
HD13/AD13
HD12/AD12
HD11/AD11
HD10/AD10
HD9/AD9
HD8/AD8
HD7/AD7
HD6/AD6
HD5/AD5
HD4/AD4
HD3/AD3
HD2/AD2
HD1/AD1
HD0/AD0
AA3
AA5
AC4
AA4
AC5
Y1
AD2
W1
AC3
AE1
AD1
W2
AC1
Y2
AB1
Y3
AB2
W4
AC2
V4
AF3
AE3
AB3
W5
AB4
Y4
AD3
Y5
AD4
W6
AB5
AE2
Host-port data [31:16] pin (
I/O/Z
) [default] or PCI data-address bus [31:16]
(
I/O/Z
)
I/O/Z
I/O/Z
Host-port data [15:0] pin (
I/O/Z
) [default] or PCI data-address bus [15:0] (
I/O/Z
)
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