參數(shù)資料
型號: TS83102G0BCGL
廠商: E2V TECHNOLOGIES PLC
元件分類: ADC
英文描述: 1-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, CBGA152
封裝: 21 X 21 MM, 1.27 MM PITCH, CERAMIC, BGA-152
文件頁數(shù): 33/60頁
文件大?。?/td> 1510K
代理商: TS83102G0BCGL
39
0830E–BDC–06/07
e2v semiconductors SAS 2007
TS83102G0B
13.3
Analog Inputs (VIN/VINB)
13.3.1
Static Issues: Differential Versus Single-ended (Full-scale Inputs)
The ADC’s front-end Track and Hold differential preamplifier has been designed to be entered either in
differential or single-ended mode, up to the maximum operating speed of 2.2 Gsps, without affecting
dynamic performances (it does not require a single to differential balun).
In a single-ended input configuration, the in-phase full-scale input amplitude is 0.5V peak-to-peak, cen-
tered on 0V (or -2 dBm into 50
).
Figure 13-3. Typical Single-ended Analog Input Configuration (Full-scale)
The analog full-scale input range is 0.5V peak-to-peak (Vpp), or -2 dBm into the 50
(100 differential)
termination resistor.
In the differential mode input configuration, this means 0.25V on each input, or ±125 mV around 0V. The
input common mode is ground.
Figure 13-4. Differential Inputs Voltage Span (Full-scale)
500 mV
Full-scale
Analog Input
+250
mV
-250
+250
mV
VIN
VINB = 0V
t
mV
+125
-125
500 mV
Full-scale
Analog Input
t
VIN
VINB
+250
mV
-250
mV
0V
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