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| 型號： | TVP3030-175 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | Video Interface PALETTE Exract(1600×1200，24位真彩色視頻接口調(diào)色器) |
| 中文描述： | 視頻接口調(diào)色板Exract（1600 × 1200,24位真彩色視頻接口調(diào)色器） |
| 文件頁數(shù)： | 20/107頁 |
| 文件大小： | 689K |
| 代理商： | TVP3030-175 |
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2–4
planes in the pseudo color or direct color + overlay modes, the additional planes are provided from the
palette-page register before the data addresses the color palette. This is illustrated in Table 2–3.
NOTE:
The additional bits from the page register are inserted after the read mask.
The palette-page register specifies the additional bit planes for the overlay field in
direct-color modes with less than 8 bits per pixel overlay.
Table 2–3. Allocation of Palette-Page Register Bits
NUMBER OF BIT PLANES
MSB
PALETTE ADDRESS BITS
LSB
8
M
M
M
M
M
M
M
M
4
P7
P6
P5
P4
M
M
M
M
2
P7
P6
M
M
M
M
M
M
1
P7
M
M
M
M
M
M
M
Pn = n bit from page register
M = bit from pixel port
Cursor and Overscan Color Registers
The registers for the three cursor colors and the overscan border color are accessed through the direct
register map. See Section 2.9 for the overscan border and Section 2.7.3 for use of the cursor colors.
2.3
The color write address register (direct register: 0100) must be initialized before writing to the color registers.
The lower two bits of this register select one of the four color registers according to Table 2–4. The selected
24-bit color register is loaded a byte at a time by writing a sequence of three bytes (red, green, and blue)
to the color data register (direct register: 0101). After the blue byte is written, the color address register
increments to the next color. All four colors may be loaded with a single write to the color write address
register followed by 12 consecutive writes to the color data register.
The color read address register (direct register: 0111) must be initialized before reading from the color
registers. The lower two bits of this register select one of the four color registers according to Table 2–4. Next,
the color data register (direct register: 0101) is read three times, producing red, green, and blue bytes from
the selected register. After the blue byte is read, the color address register is incremented to the next color.
All four colors may be read with a single write to the color read address register followed by 12 consecutive
reads of the color data register.
The sequence followed by the color address register is overscan color, cursor color 0, cursor color 1, cursor
color 2, . . ., etc. The starting point depends on what was written to the color write address or color read
address register.
Table 2–4. Color Register Address Format
BIT 1
BIT 0
REGISTER
0
0
Overscan color
0
1
Cursor color 0
1
0
Cursor color 1
1
1
Cursor color 2
2.4
The TVP3030 VIP provides a single TTL clock input (CLK0) which can be used for pixel rates up to 140 MHz.
At reset, CLK0 is selected as the clock source for VGA mode 2. This power-up state supports VGA pass
through operation without requiring software intervention. See Table 2–5 for the clock selection register
definition.
Clock Selection
There are two ways of using CLK0 as a clock source. If CSR(2–0) = 111, CLK0 is selected as the clock
source to generate the internal dot clock. In this mode, multiplex control register bit MCR6 must be logic 0
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TVP3030-175PPA | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| TVP3030-175PPM | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Converter IC |
| TVP3030-230PPA | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| TVP3030-250MEP | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| TVP3033 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Video Interface Palette |
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