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參數(shù)資料
| 型號： | UPD753036GC |
| 廠商： | NEC Corp. |
| 英文描述： | DIODE ZENER SINGLE 500mW 47Vz 2.7mA-Izt 0.05 0.1uA-Ir 36Vr DO35-GLASS 5K/REEL |
| 中文描述： | 4位單片機 |
| 文件頁數(shù)： | 16/88頁 |
| 文件大?。?/td> | 483K |
| 代理商： | UPD753036GC |
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16
μ
PD753036, 753036(A)
Data Sheet U11353EJ4V0DS00
4. SWITCHING FUNCTION BETWEEN Mk I MODE AND Mk II MODE
4.1 Difference between Mk I and Mk II
The CPU of
μ
PD753036 has the following two modes: Mk I and Mk II, either of which can be selected. The
mode can be switched by the bit 3 of the Stack Bank Select register (SBS).
Mk I mode:
Upward compatible with
μ
PD75336.
Can be used in the 75XL CPU with a ROM capacity of up to 16K bytes.
Incompatible with
μ
PD75336.
Can be used in all the 75XL CPU’s including those products whose ROM capacity is more
than 16 Kbytes.
Mk II mode:
Table 4-1. Differences between Mk I Mode and Mk II Mode
Mk I Mode
Mk II Mode
Program memory (bytes)
16384
Number of stack bytes
for subroutine instructions
2 bytes
3 bytes
BRA !addr1 instruction
CALLA !addr1 instruction
Not available
Available
CALL !addr instruction
3-machine cycles
4-machine cycles
CALLF !faddr instruction
2-machine cycles
3-machine cycles
Caution Mk II supports a program area exceeding 16K bytes in the 75X and 75XL series.
Therefore, this mode is useful for enhancing software compatibility with products
exceeding 16K bytes.
When Mk II mode is selected, the number of stack bytes used can be increased by 1 byte
per stack compared with Mk I mode. When the CALL !addr instruction and CALLF !faddr
instruction are used, the number of machine cycles becomes greater by 1. Therefore,
use Mk I mode if the RAM efficiency and processing capability is more important than
software compatibility.
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| UPD753036GCA | DIODE ZENER SINGLE 500mW 60Vz 2.1mA-Izt 0.05 0.1uA-Ir 46Vr DO35-GLASS 5K/REEL |
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