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參數(shù)資料
| 型號(hào)： | UPD753036GC |
| 廠商： | NEC Corp. |
| 英文描述： | DIODE ZENER SINGLE 500mW 47Vz 2.7mA-Izt 0.05 0.1uA-Ir 36Vr DO35-GLASS 5K/REEL |
| 中文描述： | 4位單片機(jī) |
| 文件頁(yè)數(shù)： | 17/88頁(yè) |
| 文件大?。?/td> | 483K |
| 代理商： | UPD753036GC |
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17
μ
PD753036, 753036(A)
Data Sheet U11353EJ4V0DS00
Caution Since SBS. 3 is set to “1” after a RESET signal is generated, the CPU operates in the Mk I
mode. When executing an instruction in the Mk II mode, set SBS. 3 to “0” to select the Mk
II mode.
4.2 Setting Method of Stack Bank Select Register (SBS)
Switching between the Mk I mode and Mk II mode can be done by the SBS. Figure 4-1 shows the format.
The SBS is set by a 4-bit memory manipulation instruction.
When using the Mk I mode, the SBS must be initialized to 10
××
B
Note
at the beginning of a program. When
using the Mk II mode, it must be initialized to 00
××
B
Note
.
Note
The desired numbers must be set in the
××
positions.
Figure 4-1. Stack Bank Select Register Format
SBS3
SBS2
SBS1
SBS0
3
2
1
0
Symbol
SBS
Address
F84H
0
0
0
1
1
0
1
1
0
1
0
Memory bank 0
Memory bank 1
Memory bank 2
Prohibited
Be sure to set bit 2 to 0.
Stack area specification
Mk II mode
Mk I mode
Mode switching specification
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