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參數資料
| 型號： | UPD753036GC |
| 廠商： | NEC Corp. |
| 英文描述： | DIODE ZENER SINGLE 500mW 47Vz 2.7mA-Izt 0.05 0.1uA-Ir 36Vr DO35-GLASS 5K/REEL |
| 中文描述： | 4位單片機 |
| 文件頁數： | 33/88頁 |
| 文件大?。?/td> | 483K |
| 代理商： | UPD753036GC |
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33
μ
PD753036, 753036(A)
Data Sheet U11353EJ4V0DS00
6.9 LCD Controller/Driver
The
μ
PD753036 incorporates a display controller which generates segment and common signals according
to the display data memory contents and incorporates segment and common drivers which can drive the panel
directly.
The
μ
PD753036 LCD controller/driver functions are as follows:
Display data memory is read automatically by DMA operation and segment and common signals are
generated.
Display mode can be selected from among the following five:
(1) Static
(2) 1/2 duty (time multiplexing by 2), 1/2 bias
(3) 1/3 duty (time multiplexing by 3), 1/2 bias
(4) 1/3 duty (time multiplexing by 3), 1/3 bias
(5) 1/4 duty (time multiplexing by 4), 1/3 bias
A frame frequency can be selected from among four in each display mode.
A maximum of 20 segment signal output pins (S12-S31) and four common signal bit port output (COM0-
COM3).
The segment signal output pins (S24-S27 and S28-S31) can be changed to the bit port output in 4-pin units.
Split-resistor can be incorporated to supply LCD drive power. (Mask option)
Various bias methods and LCD drive voltages can be applicable.
When display is off, current flow to the split resistor is cut.
Display data memory not used for display can be used for normal data memory.
It can also operate by using the subsystem clock.
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