- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄359354 > VDP31XXB (MICRONAS SEMICONDUCTOR HOLDING AG) Video Processor Family PDF資料下載
參數(shù)資料
| 型號： | VDP31XXB |
| 廠商： | MICRONAS SEMICONDUCTOR HOLDING AG |
| 英文描述： | Video Processor Family |
| 中文描述： | 視頻處理器系列 |
| 文件頁數(shù)： | 30/72頁 |
| 文件大小： | 597K |
| 代理商： | VDP31XXB |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁當(dāng)前第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁
VDP 31xxB
PRELIMINARY DATA SHEET
30
Micronas
3. Serial Interface
3.1. I
2
C-Bus Interface
Communication between the VDP and the external con-
troller is done via I
2
C-bus. The VDP has two I
2
C-bus
slave interfaces (for compatibility with VPC/DDP ap-
plications)
–
one in the front-end and one in the back-
end. Both I
2
C-bus interfaces use I
2
C clock synchroniza-
tion to slow down the interface if required. Both I
2
C-bus
interfaces use one level of subaddress: the I
2
C-bus chip
address is used to address the IC and a subaddress se-
lects one of the internal registers. The I
2
C-bus chip ad-
dresses are given below:
Chip
Address
A6
A5
A4
A3
A2
A1
A0
R/W
front-end
1
0
0
0
1
1
1
1/0
back-end
1
0
0
0
1
0
1
1/0
The registers of the VDP have 8 or 16-bit data size;
16-bit registers are accessed by reading/writing two
8-bit data words.
Figure 3
–
1 shows I
2
C-bus protocols for read and write
operations of the interface; the read operation requires
an extra start condition and repetition of the chip address
with read command set.
3.2. Control and Status Registers
Table 3
–
1 gives definitions of the VDP control and status
registers. The number of bits indicated for each register
in the table is the number of bits implemented in hard-
ware, i.e. a 9-bit register must always be accessed using
two data bytes but the 7 MSB will be
‘
don
’
t care
’
on write
operations and
‘
0
’
on read operations. Write registers
that can be read back are indicated in Table 3
–
1.
Functions implemented by software in the on-chip con-
trol microprocessor (FP) are explained in Table 3
–
3.
A hardware reset initializes all control registers to 0. The
automatic chip initialization loads a selected set of regis-
ters with the default values given in Table 3
–
1.
The register modes given in Table 3
–
1 are
–
w:
write only register
–
w/r:
write/read data register
–
r:
read data from VDP
–
v:
register is latched with vertical sync
–
h:
register is latched with horizontal sync
The mnemonics used in the Micronas VDP demo soft-
ware are given in the last column.
W
P
1 or 2 byte Data
W
high byte Data
S
S
Ack
Ack
Ack
Ack
0111 1100
0111 1100
R
S
Ack
SDA
SCL
1
0
S
P
P
low byte Data
Ack
W
R
Ack
Nak
S
P
=
=
=
=
=
=
0
1
0
1
Start
Stop
Ack
Nak
Fig. 3
–
1:
I
2
C-bus protocols
1000 111
1000 111
1000 111
I
2
C write access
subaddress 7c
I
2
C read access
subaddress 7c
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| VDP3108PR | Consumer IC |
| VDSGLD_38.88 | TRANS PREBIASED PNP 200MW SOT23 |
| VDSL5100I | TVS 400W 43V UNIDIRECT SMA |
| VDSL5100 | TVS 400W 40V BIDIRECT SMA |
| VDSL6100I | TVS 400W 45V UNIDIRECT SMA |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| VDP5057 | 制造商:Panasonic Industrial Company 功能描述:BELT KIT |
| VDPC5S | 制造商:Speco 功能描述:SURFACE MOUNT CAMERA FOR VDP-5000 |
| VDPS0091 | 制造商:Panasonic Industrial Company 功能描述:ROLLER |
| VDPS0102 | 制造商:Panasonic Industrial Company 功能描述:ROLLER |
| VDPS0127 | 制造商:Panasonic Industrial Company 功能描述:ROLLER |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。