參數(shù)資料
型號(hào)： VDP31XXB
廠商： MICRONAS SEMICONDUCTOR HOLDING AG
英文描述： Video Processor Family
中文描述： 視頻處理器系列
文件頁(yè)數(shù)： 49/72頁(yè)
文件大小： 597K
代理商： VDP31XXB
PRELIMINARY DATA SHEET
VDP 31xxB
49
Micronas
Short Description
Connection
(if not used)
Type
Pin Name
Pin No.
43
BIN
IN
GND
O
Analog Blue Input
44
FBLIN
IN
GND
O
Fast Blank Input
45
RIN2
IN
GND
O
Analog Red Input 2
46
GIN2
IN
GND
O
Analog Green Input 2
47
BIN2
IN
GND
O
Analog Blue Input 2
48
FBLIN2
IN
GND
O
Fast Blank Input 2
49
CLK20
OUT
LV
20 MHz System Clock Output
50
HOUT
OUT
X
Horizontal Drive Output
51
XTAL1
IN
X
Analog Crystal Input
52
XTAL2
OUT
X
Analog Crystal Output
53
VSTBY
X
Standby Supply Voltage
54
CLK5
OUT
LV
5 MHz Clock Output
55
GND
F
X
Ground, Analog Front-end
56
ISGND
IN
GND
F
Signal Ground for Analog Input
57
VRT
IN
X
Reference Voltage Top, Video ADC
58
VSUP
F
X
Supply Voltage, Analog Front-end
59
VOUT
OUT
LV
Analog Video Output
60
CIN
IN
VRT
Analog Chroma Input
61
VIN1
IN
VRT
Analog Video 1 Input
62
VIN2
IN
VRT
Analog Video 2 Input
63
VIN3
IN
VRT
Analog Video 3 Input
64
VIN4
IN
VRT
Analog Video 4 Input
4.3. Pin Descriptions
Pin 1
–
Test Input,
TEST
(Fig. 4
–
3)
This pin enables factory test modes. For normal opera-
tion it must be connected to ground.
Pin 2
–
Reset Input,
RESQ
(Fig. 4
–
3)
A low level on this pin resets the VDP 31xxB.
Pin 3
–
I
2
C Bus Clock,
SCL
(Fig. 4
–
12)
This pin connects to the I
2
C bus clock line.
Pin 4
–
I
2
C Bus Data,
SDA
(Fig. 4
–
12)
This pin connects to the I
2
C bus data line.
Pin 5
–
Ground (Digital Shield),
DSGND
Pin 6, 7, 20
–
24
–
IO Port Expander,
PORT[6:0]
(Fig.
4
–
13)
These pins provide an I
2
C programmable I/O port, which
can be used to read and write slow external signals.
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