參數(shù)資料
型號(hào)： VDP31XXB
廠商： MICRONAS SEMICONDUCTOR HOLDING AG
英文描述： Video Processor Family
中文描述： 視頻處理器系列
文件頁(yè)數(shù)： 50/72頁(yè)
文件大?。?/td> 597K
代理商： VDP31XXB
VDP 31xxB
PRELIMINARY DATA SHEET
50
Micronas
Pin 6
–
Half Contrast Switch Input,
HCS
(Fig. 4
–
16)
Via this input pin the output level of the analog RGB out-
put pins can be reduced by 3dB.
Pin 7
–
Front Sync Output,
FSY
(Fig. 4
–
13)
This pin supplies the front sync information
Pin 8
–
Composite Sync Output,
CSY
(Fig. 4
–
13)
This output supplies a standard composite sync signal
that is compatible to the analog RGB output signals.
Pin 9
–
Main Sync Output,
MSY
(Fig. 4
–
13)
This pin supplies the main sync information.
Pin 10
–
Interlace Output,
INTLC
(Fig. 4
–
13)
This pin supplies the interlace information, 0 indicates
first field, 1 indicates second field.
Pin 11
–
Vertical Protection Input,
VPROT
(Fig. 4
–
14)
The vertical protection circuitry prevents the picture tube
from burn-in in the event of a malfunction of the vertical
deflection stage. During vertical blanking, a signal level
of 2.5V is sensed. If a negative edge cannot be detected,
the RGB output signals are blanked.
Pin 12
–
Safety Input,
SAFETY
(Fig. 4
–
14)
This is a three-level input. Low level means normal func-
tion. At the medium level RGB signals are blanked and
at high level RGB signals are blanked and horizontal
drive is shut off.
Pin 13
–
Horizontal Flyback Input,
HFLB
(Fig. 4
–
14)
Via this pin the horizontal flyback pulse is supplied to the
VDP 31xxB.
Pin 14
–
Ground (Digital Circuitry Front-end),
GND
DF
Pin 15
–
Supply Voltage (Digital Circuitry),
VSUP
D
Pin 16
–
Ground (Digital Circuitry Back-end),
GND
DO
Pin 17, 18, 19
–
Picture Bus Priority,
PR[2:0]
(Fig. 4
–
5)
The Picture Bus Priority lines carry the digital priority
selection signals. The priority interface allows digital
switching of up to 8 sources to the backend processor.
Switching for different sources is prioritized and can be
done from pixel to pixel.
Pin 20...24
–
Picture Bus Color Address,
COLOR[4:0]
(Fig. 4
–
16)
The Picture Bus COLOR lines carry the digital RGB col-
or data. They are used as address for the color lookup
table.
Pin 25
–
Ground (Digital Shield),
DSGND
.
Pin 26, 27
–
Range Switch for Measurement ADC
,
RSW1, RSW2
(Fig. 4
–
19)
These pins are open drain pull-down outputs. RSW1 is
switched off during cutoff and whitedrive measurement.
RSW2 is switched off during cutoff measurement only.
Pin 28
–
Measurement ADC Input,
SENSE
(Fig. 4
–
15)
This is the input of the analog digital converter for the
picture and tube measurement.
Pin 29
–
Ground (Measurement ADC Reference Input),
GND
M
This is the ground reference for the measurement A/D
converter.
Pin 30
–
Ground (Vertical Sawtooth Output),
GND
V
(Fig.
4
–
20)
This is the ground reference for the vertical outputs.
Pin 31
–
Vertical Sawtooth Output,
VERT
(Fig. 4
–
20)
This pin supplies the drive signal for the vertical output
stage. The drive signal is generated with 15-bit precision
by the Fast Processor in the front-end. The analog volt-
age is generated by a 4-bit current-DAC with external re-
sistor and uses digital noise shaping.
Pin 32
–
East-West Parabola Output,
EW
(Fig. 4
–
20)
This pin supplies the parabola signal for the East-West
correction. The drive signal is generated with 15 bit pre-
cision by the Fast Processor in the front-end. The analog
voltage is generated by a 4-bit current-DAC with exter-
nal resistor and uses digital noise shaping.
Pin 33
–
DAC Current Reference,
XREF
(Fig. 4
–
21)
External reference resistor for DAC output currents, typi-
cal 10 k
to adjust the output current of the D/A convert-
ers (see recommended operating conditions). This re-
sistor has to be connected to analog ground as closely
as possible to the pin.
Pin 34
–
Scan Velocity Modulation Output,
SVMOUT
(Fig. 4
–
17)
This output delivers the analog SVM signal. The D/A
converter is a current sink like the RGB D/A converters.
At zero signal the output current is 50% of the maximum
output current.
Pin 35
–
Ground (Analog Back-end),
GND
O
Pin 36
–
Supply Voltage (Analog Back-end),
VSUP
O
Pin 37, 38, 39
–
Analog RGB Outputs,
ROUT, GOUT,
BOUT
(Fig. 4
–
17)
This are the analog Red/Green/Blue outputs of the back-
end. The outputs sink a current of max. 8mA.
Pin 40
–
DAC Reference Decoupling,
VRD
(Fig. 4
–
21)
Via this pin the DAC reference voltage is decoupled by
an external capacitance. The DAC output currents de-
pend on this voltage, therefore a pull-down transistor
can be used to shut off all beam currents. A decoupling
capacitor of 3.3
μ
F//100nF is required.
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