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VDP 31xxB
PRELIMINARY DATA SHEET
34
Micronas
Name
Default
Function
Mode
Number
of bits
I
2
C sub
address
CHROMA CHANNEL
h
’
14
8
w/r
luma/chroma matching delay
bit [2:0]
–
3...3
bit [3]
0/1
bit [4]
0/1
bit [7:5]
reserved, set to 0
variable chroma delay
chroma polarity signed / offset binary
C
B
(U) sample first / C
R
(V) sample first
0
1
0
0
LDB
COB
ENVU
h
’
66
9
w v
digital transient improvement
bit [3:0]
0..15
bit [7:4]
0..15
bit [8]
0/1
coring value
DTI gain
narrow/wide bandwidth mode
1
5
1
DTICO
DTIGA
DTIMO
INVERSE MATRIX
h
’
7c
h
’
74
9
9
w v
w v
main picture matrix coefficient R
–
Y = MR1M*C
B
+ MR2M*C
R
bit [8:0]
–
256/128 ... 255/128
bit [8:0]
–
256/128 ... 255/128
0
86
MR1M,
MR2M
h
’
6c
h
’
64
9
9
w v
w v
main picture matrix coefficient G
–
Y = MG1M*C
B
+ MG2M*C
R
bit [8:0]
–
256/128 ... 255/128
bit [8:0]
–
256/128 ... 255/128
–
22
–
44
MG1M,
MG2M
h
’
5c
h
’
54
9
9
w v
w v
main picture matrix coefficient B
–
Y = MB1M*C
B
+ MB2M*C
R
bit [8:0]
–
256/128 ... 255/128
bit [8:0]
–
256/128 ... 255/128
113
0
MB1M,
MB2M
h
’
78
h
’
70
9
9
w v
w v
side picture matrix coefficient R
–
Y = MR1S*C
B
+ MR2S*C
R
bit [8:0]
–
256/128 ... 255/128
bit [8:0]
–
256/128 ... 255/128
0
73
MR1S,
MR2S
h
’
68
h
’
60
9
9
w v
w v
side picture matrix coefficient G
–
Y = MG1S*C
B
+ MG2S*C
R
bit [8:0]
–
256/128 ... 255/128
bit [8:0]
–
256/128 ... 255/128
–
19
–
37
MG1S,
MG2S
h
’
58
h
’
50
9
9
w v
w v
side picture matrix coefficient B
–
Y = MB1S*C
B
+ MB2S*C
R
bit [8:0]
–
256/128 ... 255/128
bit [8:0]
–
256/128 ... 255/128
97
0
MB1S,
MB2S
COLOR LOOK-UP TABLE
h
’
00
–
h
’
0f
16
w h
color look-up table : 16 entries, 12 bit wide,
The CLUT registers are initialized at power-up
bit [3:0]
0..15
blue amplitude
bit [7:4]
0..15
green amplitude
bit [11:8]
0..15
red amplitude
000h
f00h
0f0h
ff0h
00fh
f0fh
0ffh
fffh
7ffh
700h
070h
770h
007h
707h
077h
777h
CLUT0
CLUT15
h
’
11
16
w h
picture frame color 12 bit wide,
bit [3:0]
0..15
bit [7:4]
0..15
bit [11:8]
0..15
blue amplitude
green amplitude
red amplitude
0
0
0
PFCB
PFCG
PFCR