參數(shù)資料
型號: VS6724
廠商: 意法半導(dǎo)體
英文描述: 2 Megapixel single-chip camera module
中文描述: 兩百萬像素的單芯片相機模塊
文件頁數(shù): 20/118頁
文件大?。?/td> 1200K
代理商: VS6724
Functional description
VS6724
20/118
Figure 8.
JPEG Compression image size to squeeze value relationship
2.6.4
FIFO control
The rate which the FIFO is emptied (and therefore the output PCLK frequency) can be
controlled using the bOIFClkRatio register. Changing the FIFO readout rate will in turn
change the FIFO’s fullness and therefore the squeeze factor used.
Section 2.11.2: PLL
operation on page 39
describes the calculations for PCLK
max
frequency. This frequency is
divided by the bOIFClkRatio to give the max JPEG PCLK output from the device:
bOIFClkRatio {0x2514}
1.
PCLK is 2 times slower
2.
PCLK is 4 times slower
3.
PCLK is 8 times slower
4.
PCLK is 16 times slower
5.
PCLK is 32 times slower
6.
PCLK is 64 times slower
Image size to squeeze relationship
0
200
400
600
800
1000
1200
1400
1600
1800
6
15
25
35
45
55
65
75
85
95
105
115
125
Squeeze value
I
Scene1
Scene2
Scene3
Scene4
Scene5
Scene6
Scene7
Scene8
Scene9
Scene10
Scene11
MEAN
相關(guān)PDF資料
PDF描述
VS8002LC Logic IC
VS8001FC Logic IC
VS8001FI Logic IC
VS8001LC Logic IC
VS8001LI Logic IC
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
VS6724P0FY 制造商:STMicroelectronics 功能描述:
VS6724Q0FB 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:2 Megapixel single-chip camera module
VS6725 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:2 megapixel single-chip camera module
VS6725Q045 制造商:STMicroelectronics 功能描述:
VS6725XQ045/TR 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:2 megapixel single-chip camera module