參數(shù)資料
型號(hào): VS6724
廠商: 意法半導(dǎo)體
英文描述: 2 Megapixel single-chip camera module
中文描述: 兩百萬像素的單芯片相機(jī)模塊
文件頁數(shù): 34/118頁
文件大?。?/td> 1200K
代理商: VS6724
Functional description
VS6724
34/118
Table 4.
2.10.3
Embedded synchronization EXT-CSI
The structure of a CSI image frame is shown
Figure 19
.
Figure 19.
CSI 2 frame structure (VGA example)
For CSI, the synchronization codes are as listed in
Table 5
.
Table 5.
ITU656 embedded synchronization code definition (odd frames)
Name
Description
4-byte sequence
SAV
Line start - active
FF 00 00 C7
EAV
Line end - active
FF 00 00 DA
SAV (blanking)
Line start - blanking
FF 00 00 EC
EAV (blanking)
Line end - blanking
FF 00 00 F1
CSI - embedded synchronization code definition
Name
Description
4-byte sequence
LS
Line start
FF 00 00 00
LE
Line end
FF 00 00 01
FS
Frame Start
FF 00 00 02
FE
Frame End
FF 00 00 03
LE
LS
Frame of image data
Line 1
Line 480
Frame blanking period
L
FE
FS
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