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參數(shù)資料
| 型號： | VT86C100A |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | PCI FAST ETHERNET CONTROLLER |
| 中文描述： | PCI快速以太網(wǎng)控制器 |
| 文件頁數(shù)： | 13/32頁 |
| 文件大小： | 349K |
| 代理商： | VT86C100A |
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VIA Technologies, Inc.
Preliminary VT86C100A
6. B
UFFER
M
ANAGEMENT
& H
OST
C
OMMUNICATION
The VT86C100A provides an simply and effective buffer management and host communication
method through the PCI Bus mastering : There are two descriptor lists, one for receive and one for transmit.
The base of these two list are pointed into the CRDA (18h) and CTDA (1ch) registers.
The descriptor list reside in the host physical memory address space with
double word boundary
.
And each descriptor lists just point to one single buffer, but a data buffer consists of either an entire frame or
part of a frame. Data chain can be enabled or disabled by DES1 C bit. Data buffer also reside in host physical
memory double word boundary space.
The device driver can make the last descriptors next link be point to first descriptor address, become
a ring buffer structure.
Descriptor 0
Buffer 1
Descriptor 1
Buffer 1
Next Descriptor
Figure 6-1 VT86C100A Buffer Management : Chain buffer Structure
6.1 D
ESCRIPTOR
R
ING AND
C
HAIN
S
TRUCTURE
6.1.1 R
ECEIVE
D
ESCRIPTORS
Figure 6-2 shows the receive descriptor format :
Providing single buffer, one byte-count buffers, and next descriptor address. And Chain bit control
span multiple data buffers data chain to be compatible various types of memory management schemes..
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| VT86C926 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:AMAZON PCI ETHERNET CONTROLLER |
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| VT905GA | 制造商:未知廠家 制造商全稱:未知廠家 功能描述: |
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