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參數(shù)資料
| 型號(hào)： | VT86C100A |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | PCI FAST ETHERNET CONTROLLER |
| 中文描述： | PCI快速以太網(wǎng)控制器 |
| 文件頁數(shù)： | 9/32頁 |
| 文件大?。?/td> | 349K |
| 代理商： | VT86C100A |
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VIA Technologies, Inc.
Preliminary VT86C100A
F
UNCTIONAL
D
ESCRIPTIONS
1. G
ENERAL
D
ESCRIPTION
The VT86C100A Rhine ACPI
PCI bus master
100 M FAST Ethernet controller is CMOS VLSI designed for
easy implementation of CSMA/CD IEEE 802.3u 100M local area networks. Significant features include:
twisted-pair interface, PCI Plug&Play compatibility, 32 bit bus mastering, powerful buffer management and
Early Interrupt Receive/Transmit.
The VT86C100A integrates the entire bus interface of PCI systems. Setting hardware jumpers or software
configures the VT86C100A bus interface. The VT86C100A also complies with PCI specification v2.1.. The
VT86C100A supports the Media Independent Interface (MII) network interface.
1.1 FIFO A
ND
C
ONTROL
L
OGIC
The VT86C100A incorporates two independent 2K bytes deeper FIFO for transmit or receive data from
system interface or to the network interface, providing temporary storage of data, free host system from the
real-time demands on network.
The VT86C100A enhanced the FIFO management logic to handle received data packets up to four packets
before transfer to system data buffer. This ability reduce the packets losing due to PCI bus mastering abrition
latency.
2. N
ETWORK
I
NTERFACE
The VT86C100A Rhine ACPI support one MII interface
2.1 MII Interface
The MII interface is an IEEE 802.3 compliant interface that provides a simple and easy interconnection
between the MAC layer and PHY device. This interface has support the following characteristics :
Support both 10M and 100M data rate.
Contains data and synchronous clock
4-bit independent receive and transmit data.
Uses TTL signal levels and compatibles with common CMOS processes.
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