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參數(shù)資料
| 型號： | VT86C100A |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | PCI FAST ETHERNET CONTROLLER |
| 中文描述： | PCI快速以太網(wǎng)控制器 |
| 文件頁數(shù)： | 26/32頁 |
| 文件大?。?/td> | 349K |
| 代理商： | VT86C100A |
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VIA Technologies, Inc.
Preliminary VT86C100A
ISR:
Interrupt Status Register (0CH; Type=R/W)
This register reflects the NIC status. The host reads it to determine the cause of the interrupt
Individual bits are cleared by writing a "1" to the corresponding bit. It must be cleared after
power up.
Magic packet key received interrupt status
Port status change interrupt status
transmit abort interrupt status, this bit will be set while excessive collision
No more receive buffer to use
FIFO overflow condition, next packet race into FIFO with current packet
receiving FIFO overflow interrupt status
Transmit descriptor underflow while in early transmit mode or general I/O pin M10TENI
status change interrupt while GPIOEN=1, this interrupt can be used as PHY report the
link status change.
Indicates the received packet has filled the first data buffer.
CRC error or packet race tally counter overflow interrupt, software can maintain drivers
CRC error counter above 32 bit
PCI Bus error interrupt
Receive buffer unavailable
Transmit buffer underflow
Transmit error bit is set when a packet transmission is aborted due to excessive collisions.
This bit is set when a packet is received with one or more of the following errors:
1) CRC error, 2) Frame alignment error and 3) Missed packet.
This bit indicates that packet is transmitted with no errors.
This bit indicates that packet is received with no errors.
IMR
Interrupt Mask Register (0EH; Type=R/W )
All bits correspond to the bits in the ISR register. Power up=all 0s. Setting individual bits will
enable the corresponding interrupts.
EEPROM Configuration and status Register Group
EECSR EEPROM Command Status Register (74H, Type=R/W)
EEPROM programming status
EEPROM embedded program enable, the VT86C100A will set this bit to zero after
programming complete.
Dynamic reload EEPROM content, the PAR[5-0] will be update
Direct program EEPROM
EEPROM interface chip select status
EEPROM interface clock status
EEPROM interface data in status
EEPROM interface data out status
6
EMBP
5
4
3
2
1
0
LOAD
DPM
ECS
ECK
EDI
EDO
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| VT86C926 | AMAZON PCI ETHERNET CONTROLLER |
| VT900 | Photoconductive Cells and Analog Optoisolators (Vactrols) |
| VT905GA | |
| VT905GC | |
| VT90N1 | |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| VT86C926 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:AMAZON PCI ETHERNET CONTROLLER |
| VT8N1 | 制造商:PERKINELMER 制造商全稱:PerkinElmer Optoelectronics 功能描述:Photoconductive Cells and Analog Optoisolators (Vactrols) |
| VT8N2 | 制造商:PERKINELMER 制造商全稱:PerkinElmer Optoelectronics 功能描述:Photoconductive Cells and Analog Optoisolators (Vactrols) |
| VT900 | 制造商:PERKINELMER 制造商全稱:PerkinElmer Optoelectronics 功能描述:Photoconductive Cells and Analog Optoisolators (Vactrols) |
| VT905GA | 制造商:未知廠家 制造商全稱:未知廠家 功能描述: |
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