- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄140365 > W25Q16CLSSIG (WINBOND ELECTRONICS CORP) 16M X 1 SPI BUS SERIAL EEPROM, PDSO8 PDF資料下載
參數(shù)資料
| 型號(hào)： | W25Q16CLSSIG |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | PROM |
| 英文描述： | 16M X 1 SPI BUS SERIAL EEPROM, PDSO8 |
| 封裝： | 0.208 INCH, GREEN, PLASTIC, SOIC-8 |
| 文件頁(yè)數(shù)： | 24/77頁(yè) |
| 文件大小： | 2458K |
| 代理商： | W25Q16CLSSIG |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)當(dāng)前第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)
W25Q16CL
- 30 -
11.2.14 Fast Read Dual I/O (BBh)
The Fast Read Dual I/O (BBh) instruction allows for improved random access while maintaining two IO
pins, IO0 and IO1. It is similar to the Fast Read Dual Output (3Bh) instruction but with the capability to
input the Address bits (A23-0) two bits per clock. This reduced instruction overhead may allow for code
execution (XIP) directly from the Dual SPI in some applications.
Fast Read Dual I/O with “Continuous Read Mode”
The Fast Read Dual I/O instruction can further reduce instruction overhead through setting the
“Continuous Read Mode” bits (M7-0) after the input Address bits (A23-0), as shown in figure 13a. The
upper nibble of the (M7-4) controls the length of the next Fast Read Dual I/O instruction through the
inclusion or exclusion of the first byte instruction code. The lower nibble bits of the (M3-0) are don’t care
(“x”). However, the IO pins should be high-impedance prior to the falling edge of the first data out clock.
If the “Continuous Read Mode” bits M5-4 = (1,0), then the next Fast Read Dual I/O instruction (after /CS
is raised and then lowered) does not require the BBh instruction code, as shown in figure 13b. This
reduces the instruction sequence by eight clocks and allows the Read address to be immediately entered
after /CS is asserted low. If the “Continuous Read Mode” bits M5-4 do not equal to (1,0), the next
instruction (after /CS is raised and then lowered) requires the first byte instruction code, thus returning to
normal operation. A “Continuous Read Mode” Reset instruction can also be used to reset (M7-0) before
issuing normal instructions (See 11.2.20 for detail descriptions).
Figure 13a. Fast Read Dual I/O Instruction Sequence (Initial instruction or previous M5-4
≠ 10)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| W25Q40BWUXIG | 4M X 1 SPI BUS SERIAL EEPROM, PDSO8 |
| WF128K32NA-200HM | 512K X 8 FLASH 12V PROM MODULE, 200 ns, CHIP66 |
| WS512K32N-45HI | 2M X 8 MULTI DEVICE SRAM MODULE, 45 ns, CHIP66 |
| WF128K32-70G4M5 | 512K X 8 FLASH 5V PROM MODULE, 70 ns, CQFP68 |
| WPS1M32-25MSCT | 4M X 8 MULTI DEVICE SRAM MODULE, 25 ns, SMA72 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| W25Q16CLSSIP | 制造商:WINBOND 制造商全稱:Winbond 功能描述:2.5V 16M-BIT SERIAL FLASH MEMORY WITH DUAL AND QUAD SPI |
| W25Q16CLZPIG | 制造商:WINBOND 制造商全稱:Winbond 功能描述:2.5V 16M-BIT SERIAL FLASH MEMORY WITH DUAL AND QUAD SPI |
| W25Q16CLZPIP | 制造商:WINBOND 制造商全稱:Winbond 功能描述:2.5V 16M-BIT SERIAL FLASH MEMORY WITH DUAL AND QUAD SPI |
| W25Q16CV | 制造商:WINBOND 制造商全稱:Winbond 功能描述:3V 16M-BIT SERIAL FLASH MEMORY WITH DUAL AND QUAD SPI |
| W25Q16CVDAAG | 制造商:WINBOND 制造商全稱:Winbond 功能描述:3V 16M-BIT SERIAL FLASH MEMORY WITH DUAL AND QUAD SPI |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。