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W6692A
Publication Release Date: July 2000
- 29 -
Revision A1
7.2.6 Multiframe Synchronization
As specified by ITU-T I.430, the Q bit is transmitted from TE to NT in the position normally occupied
by the auxiliary framing bit (F
A
) in one frame out of 5, whereas the S bit is transmitted from NT to TE.
The S and Q bit positions and multiframe structure are shown in Table 7.6.
The functions provided by W6692A are:
- Multiframe synchronization: Synchronization is achived when the M bit pattern has been correctly
received during 20 consecutive frames starting from frame number 1.
Note: Criterion for multiframe synchronization is not defined in I.430 Recommendation.
- S bits receive and detect: When synchronization is achieved, the four received S bits in frames 1,
6, 11, 16 are stored as S1 to S4 in the SQR register respectively. A change in the recived four
bits (S1-4) is indicated by an interrupt.
- Multiframe synchronization monitoring: Multiframe synchronization is constantly monitored. The
synchronization state is indicated by the MSYN bit in the SQR register.
- Q bits transmit and F
A
mirroring: When multiframe synchronization is achived, the four bits Q1-4
stored in the SQXR register are transmitted as the four Q bits (F
A
-bit position) in frames 1,6,11
and 16. Otherwise the F
A
bit transmitted is a mirror of the received F
A
-bit. At loss of
synchronization, the mirroring is resumed at the next F
A
-bit.
- The multiframe synchronization can be disabled by setting MFD bit in the D_MODE register.
- According to I.430 Recommendation, the S/Q channel can be used as operation and maintenance
signalling channel. At transmitter, a S/Q code for a message shall be repeated at least six times
or as many as necessary to obtain the desired response. At receiver, a message shall be
considered received only when the proper codes is received three consecutive times.