參數(shù)資料
型號: W89C880F
英文描述: LAN Hub Controller
中文描述: 局域網(wǎng)集線器控制器
文件頁數(shù): 21/72頁
文件大小: 731K
代理商: W89C880F
W89C840F
Publication Release Date:April 1997
Revision A1
- 21 -
Network media speed selection function
The W89C840F is specifically designed for both 100BASE-T and 10BASE-T Ethernet. The
transmission rate is based on the clock speed of the MII input signals TXCLK and RXCLK. The MAC
will transmit the data based on the clock rate of TXCLK, and receive the MII input data based on the
clock rate of RXCLK.
In 100BASE mode, the TXCLK and RXCLK will be at 25MHz, however, in 10BASE mode,
the TXCLK and RXCLK will be at 2.5 MHz. The clock rate of the RXCLK and the TXCLK is
dependent and determined by the external physical layer device(PHY) that supports 10/100M bit rate.
The Fast_Ethernet_Select in C18/CNCR register is used to select the mode in which the
W89C840F is working in 10M or 100Mbps. In 100Mbps (100BASE) mode, the MAC will not check
the SQE status when transmitting a packet. In 10Mbps(10BASE) mode, the SQE signal will be
checked by MAC. No further function is controlled by the Fast_Ethernet_Select of C18/CNCR register.
Device identifying function
This function is to utilize the device configuration data stored in the device configuration
registers, in which some of them loaded from the external EEPROM. You can tell the vendor, device
type, revision, signature and your own defined code through reading the contents of these registers.
The F00/FID is a read-only register that contains the vendor ID and device ID, used for
identification. Its
content is loaded from the external EEPROM when hardware reset only.
The second read only register F08/FREV used for identification. It contains the revision ID that
is also loaded from EEPROM only. The Ethernet device identification code is also included in
F08/FREV, but it is a built in code, not loaded from EEPROM.
A
nother identification register
i s the F40/FSR, a read-onl y regi ster
. The signature code
for Winbond W89C840F is built in the F40/FSR signature register. The 12Hth and 9aHth bytes will be
read out recursively when a number of consecutive PCI configuration space read operation is accessed
to the F40/FSR.
The fi rst, thi rd, fi fth, etc
odd read operation will get 12H, howeve
r, the
second, fourth, si xth,
etc even read operation will get 9aH.
For some special requirement, the field of driver
area of F40/FSR can be used as
word-
width data buffer for latching the user defined identification code.
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