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參數(shù)資料
| 型號： | W89C880F |
| 英文描述： | LAN Hub Controller |
| 中文描述： | 局域網(wǎng)集線器控制器 |
| 文件頁數(shù)： | 51/72頁 |
| 文件大小： | 731K |
| 代理商： | W89C880F |
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W89C840F
Publication Release Date:April 1997
Revision A1
- 51 -
15:0
R/W
TIME
General Timer:
The bi t
field TIME shows the content of the general timer inside
the W89C840F . The internal general timer count
s
down from the
pre-set value, a non zero value, programmed by the driver
automatically once the write transaction to the register C20/CGTR
is completed. The time unit for the internal general timer count
down is approximately 2048 times the cycle duration of the MII
TXCLK. For instance, the count down time unit for a 25 Mhz MII
TXCLK is approximately 82 us.
The C14/CISR bit 11
i s
set when TIME of C2C/CGTR reach zero.
The TIME is default 0000H.
C30/CRDAR Current Receive Descriptor Address Register
The register C30/CRDAR shows that the start address of the receive descriptor that is used by the
W89C840F receive DMA state machine to process the current receive frame.
Bit
Attribute
Bit name
Description
31:0
R
CRDA
Current Receive Descriptor Address.
The CRDA represents the start address of the current receive
descriptor that the W89C840F‘s receive DMA state machine is
used to process the received frame.
C34/CRBAR Current Receive Buffer Address Register
The register C34/CRBAR shows that the start address of the host memory used by the W89C840F
receive DMA state machine to store the current aligned long word data of the current received frame.
Bit
Attribute
Bit name
Description
31:0
R
CRBA
Current Receive Buffer Address.
The CRBA contains the pointer current address in the on-using
buffer of the host memory used by the W89C840F receive DMA
state machine to store the current aligned long word data of the
current received frame.
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