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參數(shù)資料
| 型號： | WED416S16030A10SI |
| 廠商： | WHITE ELECTRONIC DESIGNS CORP |
| 元件分類： | DRAM |
| 英文描述： | 16M X 16 SYNCHRONOUS DRAM, 7 ns, PDSO54 |
| 封裝： | TSOP2-54 |
| 文件頁數(shù)： | 24/26頁 |
| 文件大?。?/td> | 398K |
| 代理商： | WED416S16030A10SI |
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7
White Electronic Designs Corporation (508) 366-5151 www.whiteedc.com
White Electronic Designs
WED416S16030A
CURRENT STATE TRUTH TABLE
L
OP Code
Mode Register Set
Set the Mode Register
2
L
H
X
Auto orSelf Refresh
Start Auto orSelf Refresh
2,3
L
H
L
X
Precharge
No Operation
L
H
BA
Row Address
Bank Activate
Activate the specified bank and row
Idle
L
H
L
BA
Column
Write w/o Precharge
ILLEGAL
4
L
H
L
H
BA
Column
Read w/o Precharge
ILLEGAL
4
L
H
L
X
Burst Termination
No Operation
L
H
X
No Operation
H
X
Device Deselect
No Operation or Power Down
5
L
OP Code
Mode Register Set
ILLEGAL
L
H
X
Auto orSelf Refresh
ILLEGAL
L
H
L
X
Precharge
6
L
H
BA
Row Address
Bank Activate
ILLEGAL
4
Row Active
L
H
L
BA
Column
Write
Start Write; Determine if Auto Precharge
7,8
L
H
L
H
BA
Column
Read
Start Read; Determine if Auto Precharge
7,8
L
H
L
X
Burst Termination
No Operation
L
H
X
No Operation
H
X
Device Deselect
No Operation
L
OP Code
Mode Register Set
ILLEGAL
L
H
X
Auto orSelf Refresh
ILLEGAL
L
H
L
X
Precharge
Terminate Burst; Start the Precharge
L
H
BA
Row Address
Bank Activate
ILLEGAL
4
Read
L
H
L
BA
Column
Write
Terminate Burst; Start the Write cycle
8,9
L
H
L
H
BA
Column
Read
Terminate Burst; Start a new Read cycle
8,9
L
H
L
X
Burst Termination
Terminate the Burst
L
H
X
No Operation
Continue the Burst
H
X
Device Deselect
Continue the Burst
L
OP Code
Mode Register Set
ILLEGAL
L
H
X
Auto orSelf Refresh
ILLEGAL
L
H
L
X
Precharge
Terminate Burst; Start the Precharge
L
H
BA
Row Address
Bank Activate
ILLEGAL
4
Write
L
H
L
BA
Column
Write
Terminate Burst; Start a new Write cycle
8,9
L
H
L
H
BA
Column
Read
Terminate Burst; Start the Read cycle
8,9
L
H
L
X
Burst Termination
Terminate the Burst
L
H
X
No Operation
Continue the Burst
H
X
Device Deselect
Continue the Burst
L
OP Code
Mode Register Set
ILLEGAL
L
H
X
Auto orSelf Refresh
ILLEGAL
L
H
L
X
Precharge
ILLEGAL
4
Read with
L
H
BA
Row Address
Bank Activate
ILLEGAL
4
Auto Precharge
L
H
L
BA
Column
Write
ILLEGAL
L
H
L
H
BA
Column
Read
ILLEGAL
L
H
L
X
Burst Termination
ILLEGAL
L
H
X
No Operation
Continue the Burst
H
X
Device Deselect
Continue the Burst
Current State
Command
Action
Notes
CE
RAS
CAS
WE
BA0,1
A11-12
Description
A10/AP-A0
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參數(shù)描述 |
|---|---|
| WED416S16030C10SI | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:4M x 16 Bits x 4 Banks Synchronous DRAM |
| WED416S16030C75SI | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:4M x 16 Bits x 4 Banks Synchronous DRAM |
| WED416S16030C7SI | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:4M x 16 Bits x 4 Banks Synchronous DRAM |
| WED416S16030C8SI | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:4M x 16 Bits x 4 Banks Synchronous DRAM |
| WED416S8030A | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:2Mx16x 4 Banks Synchronous DRAM |
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