參數(shù)資料
型號(hào): XC2S300E-6PQ208C
廠商: Xilinx Inc
文件頁數(shù): 104/108頁
文件大?。?/td> 0K
描述: IC FPGA 1.8V 1536 CLB'S 208-PQFP
產(chǎn)品變化通告: FPGA Family Discontinuation 18/Apr/2011
標(biāo)準(zhǔn)包裝: 24
系列: Spartan®-IIE
LAB/CLB數(shù): 1536
邏輯元件/單元數(shù): 6912
RAM 位總計(jì): 65536
輸入/輸出數(shù): 146
門數(shù): 300000
電源電壓: 1.71 V ~ 1.89 V
安裝類型: 表面貼裝
工作溫度: 0°C ~ 85°C
封裝/外殼: 208-BFQFP
供應(yīng)商設(shè)備封裝: 208-PQFP(28x28)
其它名稱: 122-1211
DS077-4 (v3.0) August 9, 2013
95
Product Specification
Spartan-IIE FPGA Family: Pinout Tables
R
— OBSOLETE — OBSOLETE — OBSOLETE — OBSOLETE —
I/O, L138P_YY
5
Y10
All
-
I/O, L138P_YY
I/O, L137N_YY
5
AB10
All
-
I/O, L137N_YY
I/O, L137P_YY
5
AC10
All
-
I/O, L137P_YY
I/O
5
AD10
-
I/O
I/O, L136N
5
AE10
XC2S600E
-
I/O, L136N
I/O, L136N_Y
I/O, L136P
5
AF10
XC2S600E
-
I/O, L136P
I/O, L136P_Y
I/O
5
AD11
-
I/O
I/O, L135N_YY
5
W11
All
-
I/O, L135N_YY
I/O, L135P_YY
5
Y11
All
-
I/O, L135P_YY
I/O, L134N_YY
5
AA11
All
-
I/O, L134N_YY
I/O, L134P_YY
5
AB11
All
-
I/O, L134P_YY
I/O
5
V12
-
I/O
I/O, L133N
5
AE11
-
I/O, L133N
I/O, L133P
5
AF11
-
I/O, L133P
I/O
5
W12
-
I/O
I/O, L132N_YY
5
Y12
All
-
I/O, L132N_YY
I/O, L132P_YY
5
AA12
All
-
I/O, L132P_YY
I/O, VREF Bank 5,
L131N_YY
5
AB12
All
I/O, VREF Bank 5,
L131N_YY
I/O, VREF Bank 5,
L131N_YY
I/O, L131P_YY
5
AC12
All
-
I/O, L131P_YY
I/O
5
V13
-
I/O
I/O, L130N_YY
5
AE12
All
-
I/O, L130N_YY
I/O, L130P_YY
5
AF12
All
-
I/O, L130P_YY
I/O
5
W13
-
I/O
I/O, L129N
5
Y13
XC2S600E
-
I/O, L129N
I/O, L129N_Y
I/O, L129P
5
AA13
XC2S600E
-
I/O, L129P
I/O, L129P_Y
I/O, VREF Bank 5,
L128N
5
AB13
XC2S600E
All
I/O, VREF Bank 5,
L128N
I/O, VREF Bank 5,
L128N_Y
I/O, L128P
5
AC13
XC2S600E
-
I/O, L128P
I/O, L128P_Y
I/O
5
AD13
-
I/O
I/O, L127N
5
V14
-
I/O
I/O, L127N
I/O, L127P
5
W14
-
I/O, L127P
I/O (DLL), L126N
5
AE13
-
I/O (DLL), L126N
GCK1, I
5
AF13
-
GCK1, I
FG676 Pinouts (XC2S400E, XC2S600E) (Continued)
Pad Name
Pin
LVDS Async.
Output Option
VREF
Option
Device-Specific Pinouts
Function
Bank
XC2S400E
XC2S600E
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