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參數(shù)資料
| 型號： | XCV405E-7FG676C |
| 廠商： | Xilinx Inc |
| 文件頁數(shù)： | 1/118頁 |
| 文件大小： | 0K |
| 描述： | IC FPGA 1.8V C-TEMP 676-FBGA |
| 產(chǎn)品變化通告： | FPGA Family Discontinuation 18/Apr/2011 |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | Virtex®-E EM |
| LAB/CLB數(shù)： | 2400 |
| 邏輯元件/單元數(shù)： | 10800 |
| RAM 位總計(jì)： | 573440 |
| 輸入/輸出數(shù)： | 404 |
| 門數(shù)： | 129600 |
| 電源電壓： | 1.71 V ~ 1.89 V |
| 安裝類型： | 表面貼裝 |
| 工作溫度： | 0°C ~ 85°C |
| 封裝/外殼： | 676-BGA |
| 供應(yīng)商設(shè)備封裝： | 676-FBGA（27x27） |
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2000-2014 Xilinx, Inc. All rights reserved. All Xilinx trademarks, registered trademarks, patents, and disclaimers are as listed at http://www.xilinx.com/legal.htm.
All other trademarks and registered trademarks are the property of their respective owners. All specifications are subject to change without notice.
DS025-1 (v3.0) March 21, 2014
Module 1 of 4
Production Product Specification
1
— OBSOLETE — OBSOLETE — OBSOLETE — OBSOLETE —
Features
Fast, Extended Block RAM, 1.8 V FPGA Family
-
560 Kb and 1,120 Kb embedded block RAM
-
130 MHz internal performance (four LUT levels)
-
PCI compliant 3.3 V, 32/64-bit, 33/66-MHz
Sophisticated SelectRAM+ Memory Hierarchy
-
294 Kb of internal configurable distributed RAM
-
Up to 1,120 Kb of synchronous internal block RAM
-
True Dual-Port block RAM
-
Memory bandwidth up to 2.24 Tb/s (equivalent
bandwidth of over 100 RAMBUS channels)
-
Designed for high-performance Interfaces to
external memories
200 MHz ZBT* SRAMs
200 Mb/s DDR SDRAMs
Highly Flexible SelectIO+ Technology
-
Supports 20 high-performance interface standards
-
Up to 556 singled-ended I/Os or up to 201
differential I/O pairs for an aggregate bandwidth of
>100 Gb/s
Complete Industry-Standard Differential Signalling
Support
-
LVDS (622 Mb/s), BLVDS (Bus LVDS), LVPECL
-
Al I/O signals can be input, output, or bi-directional
-
LVPECL and LVDS clock inputs for 300+ MHz
clocks
Proprietary High-Performance SelectLink
Technology
-
80 Gb/s chip-to-chip communication link
-
Support for Double Data Rate (DDR) interface
-
Web-based HDL generation methodology
Eight Fully Digital Delay-Locked Loops (DLLs)
IEEE 1149.1 boundary-scan logic
Supported by Xilinx Foundation Series and Alliance
Series Development Systems
-
Internet Team Design (Xilinx iTD) tool ideal for
million-plus gate density designs
-
Wide selection of PC or workstation platforms
SRAM-based In-System Configuration
-
Unlimited re-programmability
Advanced Packaging Options
-
1.0 mm FG676 and FG900
-
1.27 mm BG560
0.18
μm 6-layer Metal Process with Copper
Interconnect
100% Factory Tested
* ZBT is a trademark of Integrated Device Technology, Inc.
Introduction
The Virtex-E Extended Memory (Virtex-EM) family of
FPGAs is an extension of the highly successful Virtex-E
family architecture. The Virtex-EM family (devices shown in
Table 1) includes all of the features of Virtex-E, plus addi-
tional block RAM, useful for applications such as network
switches and high-performance video graphic systems.
Xilinx developed the Virtex-EM product family to enable
customers to design systems requiring high memory band-
width, such as 160 Gb/s network switches. Unlike traditional
ASIC devices, this family also supports fast time-to-market
delivery, because the development engineering is already
completed. Just complete the design and program the
device. There is no NRE, no silicon production cycles, and no
additional delays for design re-work. In addition, designers
can update the design over a network at any time, providing
product upgrades or updates to customers even sooner.
The Virtex-EM family is the result of more than fifteen years
of FPGA design experience. Xilinx has a history of support-
ing customer applications by providing the highest level of
logic, RAM, and features available in the industry. The Vir-
tex-EM family, first FPGAs to deploy copper interconnect,
offers the performance and high memory bandwidth for
advanced system integration without the initial investment,
long development cycles, and inventory risk expected in tra-
ditional ASIC development.
0
Virtex-E 1.8 V Extended Memory
Field Programmable Gate Arrays
DS025-1 (v3.0) March 21, 2014
00
Production Product Specification
R
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XCV405E-7FG676I | 功能描述:IC FPGA 1.8V 676-BGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:Virtex®-E EM 產(chǎn)品變化通告:Step Intro and Pkg Change 11/March/2008 標(biāo)準(zhǔn)包裝:1 系列:Virtex®-5 SXT LAB/CLB數(shù):4080 邏輯元件/單元數(shù):52224 RAM 位總計(jì):4866048 輸入/輸出數(shù):480 門數(shù):- 電源電壓:0.95 V ~ 1.05 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:1136-BBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:1136-FCBGA 配用:568-5088-ND - BOARD DEMO DAC1408D750122-1796-ND - EVALUATION PLATFORM VIRTEX-5 |
| XCV405E-7FG900C | 制造商:XILINX 制造商全稱:XILINX 功能描述:Virtex-E 1.8 V Extended Memory Field Programmable Gate Arrays |
| XCV405E-7FG900I | 制造商:XILINX 制造商全稱:XILINX 功能描述:Virtex-E 1.8 V Extended Memory Field Programmable Gate Arrays |
| XCV405E-8BG404C | 制造商:XILINX 制造商全稱:XILINX 功能描述:Virtex-E 1.8 V Extended Memory Field Programmable Gate Arrays |
| XCV405E-8BG404I | 制造商:XILINX 制造商全稱:XILINX 功能描述:Virtex-E 1.8 V Extended Memory Field Programmable Gate Arrays |
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