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參數(shù)資料
| 型號(hào)： | XR17L152IM |
| 廠商： | EXAR CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | CAP .068UF 400V PEN FILM 2825 5% |
| 中文描述： | 2 CHANNEL(S), 3.125M bps, SERIAL COMM CONTROLLER, PQFP100 |
| 封裝： | 14 X 14 MM, 1 MM HEIGHT, TQFP-100 |
| 文件頁數(shù)： | 36/55頁 |
| 文件大?。?/td> | 318K |
| 代理商： | XR17L152IM |
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DISCONTINUED
XR17L152
3.3V PCI BUS DUAL UART
REV. 1.1.0
36
LCR[2]: TX and RX Stop-bit Length Select
The length of stop bit is specified by this bit in conjunction with the programmed word length.
LCR[3]: TX and RX Parity Select
Parity or no parity can be selected via this bit. The parity bit is a simple way used in communications for data
integrity check. See
Table 14
for parity selection summary below.
Logic 0 = No parity.
Logic 1 = A parity bit is generated during the transmission while the receiver checks for parity error of the
data character received.
LCR[4]: TX and RX Parity Select
If the parity bit is enabled with LCR bit-3 set to a logic 1, LCR BIT-4 selects the even or odd parity format.
Logic 0 = ODD Parity is generated by forcing an odd number of logic 1’s in the transmitted character. The
receiver must be programmed to check the same format (default).
Logic 1 = EVEN Parity is generated by forcing an even the number of logic 1’s in the transmitted character.
The receiver must be programmed to check the same format.
LCR[5]: TX and RX Parity Select
If the parity bit is enabled, LCR BIT-5 selects the forced parity format.
LCR BIT-5 = logic 0, parity is not forced (default).
LCR BIT-5 = logic 1 and LCR BIT-4 = logic 0, parity bit is forced to a logical 1 for the transmit and receive
data.
LCR BIT-5 = logic 1 and LCR BIT-4 = logic 1, parity bit is forced to a logical 0 for the transmit and receive
data.
T
ABLE
14: P
ARITY
SELECTION
LCR[6]: Transmit Break Enable
When enabled the Break control bit causes a break condition to be transmitted (the TX output is forced to a
“space”, logic 0, state). This condition remains until disabled by setting LCR bit-6 to a logic 0.
Logic 0 = No TX break condition (default).
Logic 1 = Forces the transmitter output (TX) to a “space”, logic 0, for alerting the remote receiver of a line
break condition.
BIT-2
W
ORD
LENGTH
S
TOP
BIT
LENGTH
(B
IT
TIME
(
S
))
0
5,6,7,8
1 (default)
1
5
1-1/2
1
6,7,8
2
LCR B
IT
-5LCR B
IT
-4LCR B
IT
-3
P
ARITY
SELECTION
X
X
0
No parity
0
0
1
Odd parity
0
1
1
Even parity
1
0
1
Force parity to mark, “1”
1
1
1
Force parity to space, “0”
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