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DISCONTINUED
XR17L152
3.3V PCI BUS DUAL UART
REV. 1.1.0
4
DSR0#
68
I
UART channel 0 Data Set Ready or general purpose input (active low). This
input should be connected to VCC when not used.
CD0#
69
I
UART channel 0
Carrier Detect or general purpose input (active low).
This input should be connected to VCC when not used.
RI0#
70
I
UART channel 0 Ring Indicator or general purpose input (active low). This
input should be connected to VCC when not used.
TX1
62
O
UART channel 1 Transmit Data or infrared transmit data. Normal TXD output
idles at logic 1 condition while infrared TXD output idles at a logic 0 condition.
RX1
55
I
UART channel 1 Receive Data or infrared receive data. Normal RXD input
idles at logic 1 condition while infrared RXD input idles at a logic 0 condition.
In the infrared mode, the polarity of the incoming RXD signal can be selected
via FCTR bit-4. If this bit is a logic 0, logic 0 on the RXD input is considered a
mark and if this bit is a logic 1, a logic 0 on the RXD input is considered a
space.
RTS1#
60
O
UART channel 1 Request to Send or general purpose output (active low). If
this output is not used, leave it unconnected.
CTS1#
56
I
UART channel 1 Clear to Send or general purpose input (active low). This
input should be connected to VCC when not used.
DTR1#
61
O
UART channel 1 Data Terminal Ready or general purpose output (active low).
If this output is not used, leave it unconnected.
DSR1#
57
I
UART channel 1 Data Set Ready or general purpose input (active low). This
input should be connected to VCC when not used.
CD1#
58
I
UART channel 1 Carrier Detect or general purpose input (active low). This
input should be connected to VCC when not used.
RI1#
59
I
UART channel 1 Ring Indicator or general purpose input (active low). This
input should be connected to VCC when not used.
ANCILLARY SIGNALS
MPIO0-MPIO7
52-45
I/O
Multi-purpose inputs/outputs 0-7. The function of these pin are defined thru
the Configuration Register MPIOSEL, MPIOLVL, MPIOINV, MPIO3T and
MPIOINT
EECK
84
O
Serial clock to EEPROM.
Pin has a weak internal pull-down resistor and
requires an external 10K resistor to operate correctly with the EEPROM. An
internal clock of CLK divide by 256 is used for reading the vendor and sub-
vendor ID and model number during power up or reset. However, it can be
manually clocked thru the Configuration Register REGB.
EECS
83
O
Chip select to a EEPROM device like 93C46. It is manually selectable thru the
Configuration Register REGB. Requires a pull-up 4.7K ohm resister for exter-
nal sensing of EEPROM during power up. See DAN112 for further details.
EEDI
82
O
Write data to EEPROM device. It is manually accessible thru the Configura-
tion Register REGB. The L152 auto-configuration register interface logic uses
the 16-bit format.
EEDO
81
I
Read data from EEPROM device. It is manually accessible thru the Configu-
ration Register REGB.
PIN DESCRIPTIONS
N
AME
P
IN
#
T
YPE
D
ESCRIPTION