FIGURE 8. INTERRUPT O
參數(shù)資料
型號(hào): XR17V258IV-0A-EVB
廠商: Exar Corporation
文件頁數(shù): 16/69頁
文件大小: 0K
描述: EVAL BOARD FOR XR17V258 144LQFP
標(biāo)準(zhǔn)包裝: 1
系列: *
FIGURE 8. INTERRUPT OUTPUT (ACTIVE LOW) IN ONE-SHOT AND RE-TRIGGERABLE MODES
One-shot Mode
Timer Started
Timer Timed
Out
TIMERCNTL
read
Re-triggerable
Mode
Timer Timed
Out
TIMERCNTL
read
Timer Timed
Out
XR17V258
23
REV. 1.0.2
66MHZ PCI BUS OCTAL UART WITH POWER MANAGEMENT SUPPORT
1.6.3
8XMODE [7:0] (default 0x00)
Each bit selects 8X or 16X sampling rate for that UART channel, bit [0] is channel 0. Logic 0 (default) selects
normal 16X sampling with logic one selects 8X sampling rate. Transmit and receive data rates will double by
selecting 8X.
Ch-6
Ch-7
Ch-5 Ch-4 Ch-3 Ch-2 Ch-1 Ch-0
8XMODE Register
Individual UART Channel 8X Clock Mode Enable
Bit-7 Bit-6 Bit-5 Bit-4 Bit-3 Bit-2 Bit-1 Bit-0
1.6.4
REGA [15:8] (default 0x00) Reserved
1.6.5
RESET [23:16] (default 0x00)
The 8-bit Reset register [RESET] provides the software with the ability to reset the UART(s) when there is a
need. Each bit is self-clearing after it is written a logic 1 to perform a reset to that channel. All registers in that
channel will be reset to the default condition, see Table 22 for details. .
Ch-6
Ch-7
Ch-5 Ch-4 Ch-3 Ch-2 Ch-1 Ch-0
RESET Register
Individual UART Channel Reset Enable
Bit-7 Bit-6 Bit-5 Bit-4 Bit-3 Bit-2 Bit-1 Bit-0
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