參數(shù)資料
型號： XRT75L00DIV
廠商： EXAR CORP
元件分類： 數(shù)字傳輸電路
英文描述： E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER
中文描述： DATACOM, PCM TRANSCEIVER, PQFP52
封裝： 10 X 10 MM, TQFP-52
文件頁數(shù)： 29/92頁
文件大?。?/td> 894K
代理商： XRT75L00DIV
XRT75L00D
REV. 1.0.2
E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER
24
4.0
The Transmitter Section accepts TTL/CMOS level signals from the Terminal Equipment in the selectable data
formats.
In Single-Rail or un-encoded Non-Return-to-Zero (NRZ) input data via TPData pin while the TNData pin
must be grounded. The NRZ or Single-Rail mode is selected when the SR/DR
input pin is “High” (in
Hardware Mode) or bit 0 of the control register is “1” (in Host Mode). Figure 12 illustrates the Single-Rail or
NRZ format.
THE TRANSMITTER SECTION:
In Dual-Rail mode, data is input via TPData and TNData pins. TPData contains positive data and TNData
contains negative data. The SR/DR input pin = “Low” (in Hardware Mode) or bit 0 of the control register = “0”
(in Host Mode) enables the Dual-Rail mode. Figure 13 illustrates the Dual-Rail data format.
Convert the CMOS level B3ZS or HDB3 encoded data into pulses with shapes that are compliant with the
various industry standard pulse template requirements. Figure 7, Figure 8 and Figure 9 illustrate the pulse
template requirements.
Encode the un-encoded NRZ data into either B3ZS format (for DS3 or STS-1) or HDB3 format (for E3) and
convert to pulses with shapes and width that are compliant with industry standard pulse template
requirements. Figure 7,Figure 8 and Figure 9 illustrate the pulse template requirements.
4.1
T
RANSMIT
C
LOCK
:
The Transmit Clock applied via TxClk pin, for the selected data rate (for E3 = 34.368 MHz, DS3 = 44.736 MHz
or STS-1 = 51.84 MHz), is duty cycle corrected by the internal PLL circuit to provide a 50% duty cycle clock to
the pulse shaping circuit. This allows a 30% to 70% duty cycle Transmit Clock be supplied and thus eliminates
the need to use an expensive oscillator.
4.2
B3ZS/HDB3 E
NCODER
:
When the Single-Rail (NRZ) data format is selected, the Encoder Block encodes the data into either B3ZS
format (for either DS3 or STS-1) or HDB3 format (for E3).
4.2.1
B3ZS Encoding:
F
IGURE
12. S
INGLE
-R
AIL
OR
NRZ D
ATA
F
ORMAT
(E
NCODER
AND
D
ECODER
ARE
E
NABLED
)
F
IGURE
13. D
UAL
-R
AIL
D
ATA
F
ORMAT
(
ENCODER
AND
DECODER
ARE
DISABLED
)
TxClk
TPData
Data 1 1 0
TxClk
TPData
TNData
Data 1 1 0
相關(guān)PDF資料
PDF描述
XRT75L02 TWO CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER
XRT75L02IV TWO CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER
XRT75L03D THREE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER
XRT75L04D FOUR CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER
XRT75L04DIV FOUR CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
XRT75L00DIV-F 功能描述:外圍驅(qū)動器與原件 - PCI 1-Ch DS3, E3, SONET RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
XRT75L00DIVTR 功能描述:時鐘合成器/抖動清除器 3.3V 1 CH E3/DS3/STS W/SONET DE-SYNCH RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel
XRT75L00DIVTR-F 功能描述:時鐘合成器/抖動清除器 3.3V 1 CH E3/DS3/STS W/SONET DE-SYNCH RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel
XRT75L00ES 功能描述:時鐘合成器/抖動清除器 1CH T3/E3/STS1 LIU+JA 3.3V RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel
XRT75L00IV 功能描述:外圍驅(qū)動器與原件 - PCI 3.3V 1 CH E3/DS3/STS W/JITTER ATTEN RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
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