NOTE
參數(shù)資料
型號: XRT75R03IVTR-F
廠商: Exar Corporation
文件頁數(shù): 36/92頁
文件大小: 0K
描述: IC LIU E3/DS3/STS-1 3CH 128LQFP
標準包裝: 750
類型: 線路接口裝置(LIU)
驅(qū)動器/接收器數(shù): 3/3
規(guī)程: DS3,E3,STS-1
電源電壓: 3.135 V ~ 3.465 V
安裝類型: 表面貼裝
封裝/外殼: 128-LQFP
供應(yīng)商設(shè)備封裝: 128-LQFP(14x20)
包裝: 帶卷 (TR)
xr
XRT75R03
THREE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
REV. 1.0.8
38
NOTE: The above values are at TA = 250C and VDD = 3.3V ± 5%.
NOTE:
If the R/W bit is set to "1", then this denotes a "READ" operation with the Microprocessor Serial Interface.
Conversely, if the R/W bit is set to "0", then this denotes a "WRITE" operation.
TABLE 7: DS3 TRANSMITTER LINE SIDE OUTPUT AND RECEIVER LINE SIDE INPUT SPECIFICATIONS (GR-499)
PARAMETER
MIN
TYP
MAX
UNITS
TRANSMITTER LINE SIDE OUTPUT CHARACTERISTICS
Transmit Output Pulse Amplitude
(measured with TxLEV = 0)
0.65
0.75
0.85
Vpk
Transmit Output Pulse Amplitude
(measured with TxLEV = 1)
0.90
1.00
1.10
Vpk
Transmit Output Pulse Width
10.10
11.18
12.28
ns
Transmit Output Pulse Amplitude Ratio
0.90
1.00
1.10
Transmit Intrinsic Jitter
0.02
0.05
UIpp
RECEIVER LINE SIDE INPUT CHARACTERISTICS
Receiver Sensitivity (length of cable)
900
1100
feet
Jitter Tolerance @ 400 KHz (Cat II)
0.15
UIpp
Signal Level to Declare Loss of Signal
Refer to Table 10
Signal Level to Clear Loss of Signal
Refer to Table 10
FIGURE 11. MICROPROCESSOR SERIAL INTERFACE STRUCTURE
D0
D1
D2
D7
D6
D5
D4
D3
High Z
SDO
A0
D0
R/W
D1
0
A5
A4
A3
A2
A1
D7
D6
D5
D4
D3
D2
SDI
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
SClk
CS
High Z
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