參數(shù)資料
型號: XRT75R03IVTR-F
廠商: Exar Corporation
文件頁數(shù): 73/92頁
文件大小: 0K
描述: IC LIU E3/DS3/STS-1 3CH 128LQFP
標準包裝: 750
類型: 線路接口裝置(LIU)
驅(qū)動器/接收器數(shù): 3/3
規(guī)程: DS3,E3,STS-1
電源電壓: 3.135 V ~ 3.465 V
安裝類型: 表面貼裝
封裝/外殼: 128-LQFP
供應商設備封裝: 128-LQFP(14x20)
包裝: 帶卷 (TR)
xr
XRT75R03
THREE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
REV. 1.0.8
72
4
Analog LOS Defect
Declared
R/O
0
Analog LOS Defect Declared:
This READ-ONLY bit-field indicates whether or not the
Analog LOS (Loss of Signal) detector is declaring the LOS
Defect condition.
For DS3 and STS-1 applications, the Analog LOS Detector
will declare the LOS Defect condition whenever it deter-
mines that the amplitude of the pulses (within the incoming
DS3/STS-1 line signal) drops below a certain Analog LOS
Defect Declaration threshold level.
Conversely, (again for DS3 and STS-1 applications) the
Analog LOS Detector will clear the LOS Defect condition
whenever it determines that the amplitude of the pulses
(within the incoming DS3/STS-1 line signal) has risen
above a certain Analog LOS Defect Clearance threshold
level.
It should be noted that, in order to prevent "chattering"
within the Analog LOS Detector output, there is some built-
in hysteresis between the Analog LOS Defect Declaration
and the Analog LOS Defect Clearance threshold levels.
0 - Indicates that the Analog LOS Detector is NOT declar-
ing the LOS Defect Condition.
1 - Indicates that the Analog LOS Detector is currently
declaring the LOS Defect condition.
NOTES:
1.
LOS Detection (within each channel of the
XRT75R03) is performed by both an Analog LOS
Detector and a Digital LOS Detector. The LOS
state of a given Channel is simply a WIRED-OR
of the LOS Defect Declare states of these two
detectors.
2.
The current LOS Defect Condition (for the
channel) can be determined by reading out the
contents of Bit 1 (Receive LOS Defect Declared)
within this register.
BIT NUMBER
NAME
TYPE
DEFAULT
VALUE
DESCRIPTION
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